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/linux/Documentation/networking/
H A Dtls-offload-layers.svg1 …l0 720.0l-960.0 0l0 -720.0z" clip-rule="nonzero"/></clipPath><g clip-path="url(#p.0)"><path fill="…
H A Dtls-offload-reorder-bad.svg1 …l0 720.0l-960.0 0l0 -720.0z" clip-rule="nonzero"/></clipPath><g clip-path="url(#p.0)"><path fill="…
H A Dtls-offload-reorder-good.svg1 …l0 720.0l-960.0 0l0 -720.0z" clip-rule="nonzero"/></clipPath><g clip-path="url(#p.0)"><path fill="…
/linux/arch/sparc/include/asm/
H A Dhead_32.h13 rd %psr, %l0; b label; rd %wim, %l3; nop;
16 #define SRMMU_TFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 1, %l7;
17 #define SRMMU_DFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 0, %l7;
21 rd %psr, %l0; mov num, %l7; b bad_trap_handler; rd %wim, %l3;
38 rd %psr, %l0;
42 rd %psr,%l0; \
50 rd %psr,%l0; \
59 b getcc_trap_handler; rd %psr, %l0; nop; nop;
63 b setcc_trap_handler; rd %psr, %l0; nop; nop;
73 mov int_level, %l7; rd %psr, %l0; b real_irq_entry; rd %wim, %l3;
[all …]
/linux/arch/sparc/power/
H A Dhibernate_asm.S50 /* Write restore_pblist to %l0 */
51 sethi %hi(restore_pblist), %l0
52 ldx [%l0 + %lo(restore_pblist)], %l0
71 cmp %l0, %g0
73 sub %l0, %g7, %l0
75 ldxa [%l0 ] %asi, %l1 /* address */
76 ldxa [%l0 + 8] %asi, %l2 /* orig_address */
92 ldxa [%l0 + 16] %asi, %l0
/linux/Documentation/virt/kvm/x86/
H A Drunning-nested-guests.rst23 | L0 (Host Hypervisor) |
31 - L0 – level-0; the bare metal host, running KVM
33 - L1 – level-1 guest; a VM running on L0; also called the "guest
44 resulting in at least four levels in a nested setup — L0 (bare
48 This document will stick with the three-level terminology (L0,
88 1. On the bare metal host (L0), list the kernel modules and ensure that
128 metal host (L0). Parameters for Intel hosts::
147 Once your bare metal host (L0) is configured for nesting, you should be
165 1. On the host hypervisor (L0), enable the ``nested`` parameter on
217 L0, L1 and L2; this can result in tedious back-n-forth between the bug
[all …]
/linux/arch/arc/include/asm/
H A Datomic64-arcv2.h57 " " #op1 " %L0, %L0, %L2 \n" \
74 " " #op1 " %L0, %L0, %L2 \n" \
96 " " #op1 " %L1, %L0, %L3 \n" \
146 " brne %L0, %L2, 2f \n" in ATOMIC64_OPS()
188 " sub.f %L0, %L0, 1 # w0 - 1, set C on borrow\n" in arch_atomic64_dec_if_positive()
212 " brne %L0, %L4, 2f # continue to add since v != u \n" in arch_atomic64_fetch_add_unless()
215 " add.f %L1, %L0, %L3 \n" in arch_atomic64_fetch_add_unless()
/linux/arch/sparc/kernel/
H A Dhvtramp.S47 mov %o0, %l0
49 lduw [%l0 + HVTRAMP_DESCR_CPU], %g1
53 ldx [%l0 + HVTRAMP_DESCR_FAULT_INFO_VA], %g2
57 lduw [%l0 + HVTRAMP_DESCR_NUM_MAPPINGS], %l2
58 add %l0, HVTRAMP_DESCR_MAPS, %l3
75 ldx [%l0 + HVTRAMP_DESCR_FAULT_INFO_PA], %o0
84 ldx [%l0 + HVTRAMP_DESCR_THREAD_REG], %l6
H A Dhead_64.S167 rd %pc, %l0
170 sub %l0, %l1, %l1
185 sub %l0, %l1, %l1
191 sub %l0, %l1, %l1
192 sub %l0, %l2, %l2
193 sub %l0, %l5, %l5
215 sub %l0, %l1, %l1
216 sub %l0, %l2, %l2
217 sub %l0, %l3, %l3
218 stw %l0, [%l3]
[all …]
H A Drtrap_64.S68 mov %l0, %o2
162 ldx [%g6 + TI_FLAGS], %l0
165 andcc %l0, %o0, %g0
169 andcc %l0, _TIF_NEED_RESCHED, %g0
171 andcc %l0, _TIF_DO_NOTIFY_RESUME_MASK, %g0
235 661: ldxa [%l7 + %l7] ASI_DMMU, %l0
238 ldxa [%l7 + %l7] ASI_MMU, %l0
243 or %l0, %l1, %l0
245 661: stxa %l0, [%l7] ASI_DMMU
248 stxa %l0, [%l7] ASI_MMU
/linux/arch/alpha/lib/
H A Dev67-strncat.S20 * L - lower subcluster; L0 - subcluster L0; L1 - subcluster L1
58 bsr $23, __stxncpy # L0 :/* Now do the append. */
65 ret # L0 :
81 ret # L0 :
87 ret # L0 :
93 ret # L0 :
H A Dev67-strlen.S19 * L - lower subcluster; L0 - subcluster L0; L1 - subcluster L1
48 ret $31, ($26) # L0 :
H A Dev67-strcat.S15 * L - lower subcluster; L0 - subcluster L0; L1 - subcluster L1
53 br __stxcpy # L0 :
H A Dev6-memchr.S28 * L - lower subcluster; L0 - subcluster L0; L1 - subcluster L1
96 ret # L0 : L U L U
120 ret # L0 : L U L U
190 ret # L0 :
H A Dev67-strchr.S16 * L - lower subcluster; L0 - subcluster L0; L1 - subcluster L1
87 ret # L0 :
/linux/drivers/cpufreq/
H A Darmada-37xx-cpufreq.c205 * For Armada 37xx soc, L0(VSET0) VDD AVS value is set to SVC revision
207 * - L0 can be read out from the register of AVS_CTRL_0 and L0 voltage
209 * - L1 voltage should be about 100mv smaller than L0 voltage
210 * - L2 & L3 voltage should be about 150mv smaller than L0 voltage.
212 * on L0 voltage and fill all AVS values to the AVS value table.
226 /* Get L0 VDD min value */ in armada37xx_cpufreq_avs_configure()
231 pr_err("L0 VDD MIN %d is not correct.\n", l0_vdd_min); in armada37xx_cpufreq_avs_configure()
238 * If L0 voltage is smaller than 1000mv, then all VDD sets in armada37xx_cpufreq_avs_configure()
239 * use L0 voltage; in armada37xx_cpufreq_avs_configure()
247 * Set the avs values for load L0 and L1 when base CPU frequency in armada37xx_cpufreq_avs_configure()
[all …]
/linux/tools/perf/pmu-events/arch/x86/jaketown/
H A Duncore-interconnect.json411 "BriefDescription": "Cycles in L0",
416 …L0 power mode in the Link Layer. L0 is the default mode which provides the highest performance wi…
532 …L0) mode, flits are made up of four 'fits', each of which contains 20 bits of data (along with som…
542 …L0) mode, flits are made up of four 'fits', each of which contains 20 bits of data (along with som…
552 …L0) mode, flits are made up of four 'fits', each of which contains 20 bits of data (along with som…
562 …L0) mode, flits are made up of four 'fits', each of which contains 20 bits of data (along with som…
572 …L0) mode, flits are made up of four 'fits', each of which contains 20 bits of data (along with som…
582 …L0) mode, flits are made up of four 'fits', each of which contains 20 bits of data (along with som…
592 …L0) mode, flits are made up of four 'fits', each of which contains 20 bits of data (along with som…
602 …L0) mode, flits are made up of four 'fits', each of which contains 20 bits of data (along with som…
[all …]
/linux/arch/sparc/lib/
H A Dmuldi3.S57 mov %o0, %l0
61 add %l0, %o0, %l0
63 add %l2, %l0, %i0
H A Dmcount.S60 mov %g2, %l0
87 mov %g2, %l0
111 mov %l0, %o0
/linux/sound/soc/intel/common/
H A Dsoc-acpi-intel-mtl-match.c1221 .sof_tplg_filename = "sof-mtl-rt713-l0-rt1316-l12-rt1713-l3.tplg",
1227 .sof_tplg_filename = "sof-mtl-rt713-l0-rt1318-l12-rt1713-l3.tplg",
1233 .sof_tplg_filename = "sof-mtl-rt713-l0-rt1318-l1-rt1713-l3.tplg",
1239 .sof_tplg_filename = "sof-mtl-rt713-l0-rt1316-l12.tplg",
1245 .sof_tplg_filename = "sof-mtl-rt712-l0-rt1712-l3.tplg",
1252 .sof_tplg_filename = "sof-mtl-rt712-vb-l0.tplg",
1259 .sof_tplg_filename = "sof-mtl-rt712-l0.tplg",
1266 .sof_tplg_filename = "sof-mtl-rt1318-l12-rt714-l0.tplg"
1272 .sof_tplg_filename = "sof-mtl-cs42l43-l0-cs35l56-l23.tplg",
1286 .sof_tplg_filename = "sof-mtl-cs42l43-l0-cs35l56-l12.tplg",
[all …]
H A Dsoc-acpi-intel-arl-match.c461 .sof_tplg_filename = "sof-arl-cs42l43-l0-cs35l56-l23.tplg",
468 .sof_tplg_filename = "sof-arl-cs42l43-l0-cs35l56-l23.tplg",
475 .sof_tplg_filename = "sof-arl-cs42l43-l0-cs35l56-l23.tplg",
482 .sof_tplg_filename = "sof-arl-cs42l43-l0-cs35l56-l2.tplg",
489 .sof_tplg_filename = "sof-arl-cs42l43-l0.tplg",
510 .sof_tplg_filename = "sof-arl-rt711-l0-rt1316-l3.tplg",
522 .sof_tplg_filename = "sof-arl-rt711-l0.tplg",
H A Dsoc-acpi-intel-lnl-match.c713 .sof_tplg_filename = "sof-lnl-rt722-l0.tplg", /* Reuse the existing tplg file */
719 .sof_tplg_filename = "sof-lnl-rt711-l0-rt1316-l23-rt714-l1.tplg",
725 .sof_tplg_filename = "sof-lnl-cs42l43-l0-cs35l56-l23.tplg",
737 .sof_tplg_filename = "sof-lnl-cs42l43-l0-cs35l56-l3.tplg",
743 .sof_tplg_filename = "sof-lnl-cs42l43-l0.tplg",
762 .sof_tplg_filename = "sof-lnl-rt722-l0.tplg",
769 .sof_tplg_filename = "sof-lnl-rt1318-l12-rt714-l0.tplg"
775 .sof_tplg_filename = "sof-lnl-rt1320-l12-rt714-l0.tplg"
781 .sof_tplg_filename = "sof-lnl-rt713-l0-rt1318-l1.tplg"
/linux/tools/testing/selftests/bpf/progs/
H A Dverifier_tailcall_jit.c49 __jited(" ja L0")
53 __jited("L0: pushq %rax") /* rbp[-8] = rax */
85 __jited(" jae L0")
91 __jited("L0: leave")
/linux/fs/jfs/
H A Djfs_dmap.h67 * - the number of L0 pages preceding its L0 page
69 * - 3 is added to account for the L2, L1, and L0 page for this dmap
80 * The calculation figures out how many logical pages are in front of the L0.
82 * - the number of L0 pages preceding it
84 * - 2 is added to account for the L2, and L1 page for this L0
97 * - the number of L0 pages preceding it
/linux/arch/powerpc/kvm/
H A DKconfig158 bool "Nested L0 host workaround for L1 KVM host PMU handling bug" if EXPERT
163 reflect the PMU in-use status of their L2 guest to the L0 host
168 Selecting this option for the L0 host implements a workaround for
179 L0-Hypervisor stats on a kvm-hv enabled PSeries LPAR like:

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