| /linux/Documentation/filesystems/ext4/ |
| H A D | blocks.rst | 7 sectors between 1KiB and 64KiB, and the number of sectors must be an 10 4KiB. You may experience mounting problems if block size is greater than 11 page size (i.e. 64KiB blocks on a i386 which only has 4KiB memory 24 - 1KiB 25 - 2KiB 26 - 4KiB 27 - 64KiB 86 - 1KiB 87 - 2KiB 88 - 4KiB [all …]
|
| H A D | blockmap.rst | 8 …ct block: (file blocks 12 to (``$block_size`` / 4) + 11, or 12 to 1035 if 4KiB blocks) … 13 …block_size`` / 4) | Direct map to (``$block_size`` / 4) blocks (1024 if 4KiB blocks) | … 16 …block_size`` / 4) ^ 2 + (``$block_size`` / 4) + 11, or 1036 to 1049611 if 4KiB blocks) … 21 …k_size`` / 4) | Map to (``$block_size`` / 4) indirect blocks (1024 if 4KiB blocks) … 26 …block_size`` / 4) | Direct map to (``$block_size`` / 4) blocks (1024 if 4KiB blocks) | | … 30 …``$block_size`` / 4) ^ 2 + (``$block_size`` / 4) + 12, or 1049612 to 1074791436 if 4KiB blocks) | 35 …` / 4) | Map to (``$block_size`` / 4) double indirect blocks (1024 if 4KiB blocks) … 40 …k_size`` / 4) | Map to (``$block_size`` / 4) indirect blocks (1024 if 4KiB blocks) … 45 …block_size`` / 4) | Direct map to (``$block_size`` / 4) blocks (1024 if 4KiB blocks) | | |…
|
| /linux/arch/arm/boot/dts/broadcom/ |
| H A D | bcm2836.dtsi | 58 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set 61 i-cache-sets = <512>; // 32KiB(size)/32(line-size)=1024ways/2-way set 72 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set 75 i-cache-sets = <512>; // 32KiB(size)/32(line-size)=1024ways/2-way set 86 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set 89 i-cache-sets = <512>; // 32KiB(size)/32(line-size)=1024ways/2-way set 100 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set 103 i-cache-sets = <512>; // 32KiB(size)/32(line-size)=1024ways/2-way set 118 cache-sets = <1024>; // 512KiB(size)/64(line-size)=8192ways/8-way set
|
| H A D | bcm2837.dtsi | 57 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set 60 i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set 72 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set 75 i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set 87 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set 90 i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set 102 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set 105 i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set 120 cache-sets = <512>; // 512KiB(size)/64(line-size)=8192ways/16-way set
|
| H A D | bcm2835.dtsi | 29 d-cache-sets = <256>; // 16KiB(size)/16(line-size)=1024ways/4-way set 32 i-cache-sets = <256>; // 16KiB(size)/16(line-size)=1024ways/4-way set
|
| /linux/Documentation/arch/arm/ |
| H A D | tcm.rst | 8 This is usually just a few (4-64) KiB of RAM inside the ARM 15 The size of DTCM or ITCM is minimum 4KiB so the typical 16 minimum configuration is 4KiB ITCM and 4KiB DTCM. 42 on, supporting a maximum of 32KiB of ITCM and 32KiB of DTCM. 45 TCMs in two separate banks, so for example an 8KiB ITCM is divided 46 into two 4KiB banks with its own control registers. The idea is to
|
| /linux/Documentation/admin-guide/device-mapper/ |
| H A D | dm-ebs.rst | 36 2^N supported, e.g. 8 = emulate 8 sectors of 512 bytes = 4KiB. 47 Emulate 2 sector = 1KiB logical block size on /dev/sda starting at 48 offset 128 sectors, enforce 2KiB underlying device block size. 49 This presumes 2KiB logical blocksize on /dev/sda or less to work:
|
| /linux/Documentation/ABI/stable/ |
| H A D | sysfs-devices-system-xen_memory | 54 As target above, except the value is in KiB. 61 Current size (in KiB) of this domain's memory 69 Amount (in KiB) of high memory in the balloon. 76 Amount (in KiB) of low (or normal) memory in the
|
| /linux/tools/perf/arch/x86/util/ |
| H A D | intel-bts.c | 32 #define KiB(x) ((x) * 1024) 34 #define KiB_MASK(x) (KiB(x) - 1) 161 opts->auxtrace_mmap_pages = KiB(128) / page_size; in intel_bts_recording_options() 163 opts->mmap_pages = KiB(256) / page_size; in intel_bts_recording_options() 167 opts->mmap_pages = KiB(256) / page_size; in intel_bts_recording_options() 198 opts->auxtrace_mmap_pages = KiB(128) / page_size; in intel_bts_recording_options() 200 opts->mmap_pages = KiB(256) / page_size; in intel_bts_recording_options() 210 min_sz = KiB(4); in intel_bts_recording_options() 212 min_sz = KiB(8); in intel_bts_recording_options() 28 #define KiB( global() macro
|
| /linux/drivers/gpu/drm/imagination/ |
| H A D | pvr_mmu.h | 32 * device page sizes are: 4KiB, 16KiB, 64KiB, 256KiB, 1MiB and 2MiB.
|
| /linux/drivers/mtd/tests/ |
| H A D | speedtest.c | 259 pr_info("eraseblock write speed is %ld KiB/s\n", speed); in mtd_speedtest_init() 277 pr_info("eraseblock read speed is %ld KiB/s\n", speed); in mtd_speedtest_init() 299 pr_info("page write speed is %ld KiB/s\n", speed); in mtd_speedtest_init() 317 pr_info("page read speed is %ld KiB/s\n", speed); in mtd_speedtest_init() 339 pr_info("2 page write speed is %ld KiB/s\n", speed); in mtd_speedtest_init() 357 pr_info("2 page read speed is %ld KiB/s\n", speed); in mtd_speedtest_init() 367 pr_info("erase speed is %ld KiB/s\n", speed); in mtd_speedtest_init() 395 pr_info("%dx multi-block erase speed is %ld KiB/s\n", in mtd_speedtest_init()
|
| /linux/arch/arm64/boot/dts/broadcom/ |
| H A D | bcm2712.dtsi | 69 d-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set 72 i-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set 79 cache-sets = <1024>; //512KiB(size)/64(line-size)=8192ways/8-way set 93 d-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set 96 i-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set 103 cache-sets = <1024>; //512KiB(size)/64(line-size)=8192ways/8-way set 117 d-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set 120 i-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set 127 cache-sets = <1024>; //512KiB(size)/64(line-size)=8192ways/8-way set 141 d-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set [all …]
|
| /linux/arch/arm/boot/dts/marvell/ |
| H A D | armada-385-linksys-rango.dts | 97 reg = <0x200000 0x20000>; /* 128KiB */ 102 reg = <0x220000 0x40000>; /* 256KiB */ 107 reg = <0x7e0000 0x40000>; /* 256KiB */ 113 reg = <0x820000 0x1e0000>; /* 1920KiB */
|
| /linux/tools/perf/arch/arm64/util/ |
| H A D | arm-spe.c | 33 #define KiB(x) ((x) * 1024) macro 196 * snapshot size is specified, then the default is 4MiB for privileged users, 128KiB for in arm_spe_snapshot_resolve_auxtrace_defaults() 199 * The default auxtrace mmap size is 4MiB/page_size for privileged users, 128KiB for in arm_spe_snapshot_resolve_auxtrace_defaults() 201 * will be reduced from the default 512KiB/page_size to 256KiB/page_size, otherwise the in arm_spe_snapshot_resolve_auxtrace_defaults() 212 opts->auxtrace_mmap_pages = KiB(128) / page_size; in arm_spe_snapshot_resolve_auxtrace_defaults() 214 opts->mmap_pages = KiB(256) / page_size; in arm_spe_snapshot_resolve_auxtrace_defaults() 217 opts->mmap_pages = KiB(256) / page_size; in arm_spe_snapshot_resolve_auxtrace_defaults() 340 opts->auxtrace_mmap_pages = KiB(128) / page_size; in arm_spe_setup_aux_buffer() 342 opts->mmap_pages = KiB(25 in arm_spe_setup_aux_buffer() [all...] |
| H A D | hisi-ptt.c | 28 #define KiB(x) ((x) * 1024) macro 76 opts->auxtrace_mmap_pages = KiB(128) / page_size; in hisi_ptt_set_auxtrace_mmap_page() 78 opts->mmap_pages = KiB(256) / page_size; in hisi_ptt_set_auxtrace_mmap_page() 85 size_t min_sz = KiB(8); in hisi_ptt_set_auxtrace_mmap_page()
|
| /linux/drivers/mtd/nand/onenand/ |
| H A D | Kconfig | 63 of 4KiB. Plane1 has only even blocks such as block0, block2, block4 65 So MTD regards it as 4KiB page size and 256KiB block size
|
| /linux/tools/perf/arch/powerpc/util/ |
| H A D | auxtrace.c | 18 #define KiB(x) ((x) * 1024) 32 opts->auxtrace_mmap_pages = KiB(128) / page_size; in powerpc_vpadtl_recording_options() 34 opts->mmap_pages = KiB(256) / page_size; in powerpc_vpadtl_recording_options() 17 #define KiB( global() macro
|
| /linux/fs/jffs2/ |
| H A D | build.c | 355 dbg_fsbuild("trigger levels (size %d KiB, block size %d KiB, %d blocks)\n", in jffs2_calc_trigger_levels() 357 dbg_fsbuild("Blocks required to allow deletion: %d (%d KiB)\n", in jffs2_calc_trigger_levels() 359 dbg_fsbuild("Blocks required to allow writes: %d (%d KiB)\n", in jffs2_calc_trigger_levels() 361 dbg_fsbuild("Blocks required to quiesce GC thread: %d (%d KiB)\n", in jffs2_calc_trigger_levels() 363 dbg_fsbuild("Blocks required to allow GC merges: %d (%d KiB)\n", in jffs2_calc_trigger_levels() 365 dbg_fsbuild("Blocks required to GC bad blocks: %d (%d KiB)\n", in jffs2_calc_trigger_levels()
|
| /linux/Documentation/core-api/ |
| H A D | swiotlb.rst | 107 bytes, which is 256 KiB with current definitions. When a device's DMA settings 109 must be limited to that 256 KiB. This value is communicated to higher-level 123 swiotlb, max_sectors_kb might be 512 KiB or larger. If a device might use 124 swiotlb, max_sectors_kb will be 256 KiB. When min_align_mask is non-zero, 125 max_sectors_kb might be even smaller, such as 252 KiB. 156 Each pool is divided into "slots" of size IO_TLB_SIZE, which is 2 KiB with 223 of 4 MiB and the 256 KiB minimum area size, only 16 areas can be created. If 259 IO_TLB_SIZE (2 KiB currently). The io_tlb_slot array is indexed by the slot
|
| /linux/Documentation/filesystems/nfs/ |
| H A D | rpc-server-gss.rst | 55 A) It can handle tokens that are no bigger than 2KiB 58 beyond 64KiB in size due to various authorization extensions attacked to 65 back to the kernel (4KiB).
|
| /linux/Documentation/staging/ |
| H A D | xz.rst | 74 desktop systems while 64 KiB to 1 MiB might be more appropriate on 80 are allocated which take a little less than 30 KiB of memory. 91 xz --threads=1 --check=crc32 --lzma2=dict=512KiB inputfile
|
| /linux/include/linux/ |
| H A D | xz.h | 153 * In the kernel, dictionary sizes of 64 KiB, 128 KiB, 256 KiB, 154 * 512 KiB, and 1 MiB are probably the only reasonable values, 252 * @dict_size: LZMA dictionary size. This must be at least 4 KiB and 259 * The amount of allocated memory is a little less than 30 KiB with XZ_SINGLE.
|
| /linux/Documentation/gpu/ |
| H A D | panfrost.rst | 36 drm-resident-memory: 36496 KiB 37 drm-purgeable-memory: 128 KiB
|
| /linux/Documentation/security/tpm/ |
| H A D | tpm_tis.rst | 21 Communication is based on a 20 KiB buffer shared by the TPM chip through a 23 further split into five equal-size 4 KiB buffers, which provide equivalent
|
| /linux/lib/ |
| H A D | decompress_unxz.c | 52 * may be up to 64 KiB of actual payload in the chunk. Often the payload is 54 * chunk has only 32 KiB of payload. 74 * - 8 bytes per every 32 KiB of uncompressed size (one LZMA2 chunk header 75 * per chunk, each chunk having average payload size of 32 KiB); and 76 * - 64 KiB (biggest possible LZMA2 chunk payload size) to make sure that
|