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Searched full:jh7110_sysclk_stg_axiahb (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/clk/starfive/
H A Dclk-starfive-jh7110-sys.c55 JH71X0__DIV(JH7110_SYSCLK_STG_AXIAHB, "stg_axiahb", 2, JH7110_SYSCLK_AXI_CFG0),
56 JH71X0_GATE(JH7110_SYSCLK_AHB0, "ahb0", CLK_IS_CRITICAL, JH7110_SYSCLK_STG_AXIAHB),
57 JH71X0_GATE(JH7110_SYSCLK_AHB1, "ahb1", CLK_IS_CRITICAL, JH7110_SYSCLK_STG_AXIAHB),
58 JH71X0__DIV(JH7110_SYSCLK_APB_BUS, "apb_bus", 8, JH7110_SYSCLK_STG_AXIAHB),
183 JH71X0_GATE(JH7110_SYSCLK_GMAC1_AXI, "gmac1_axi", 0, JH7110_SYSCLK_STG_AXIAHB),
/linux/Documentation/devicetree/bindings/clock/
H A Dstarfive,jh7110-stgcrg.yaml70 <&syscrg JH7110_SYSCLK_STG_AXIAHB>,
H A Dstarfive,jh7110-aoncrg.yaml97 <&syscrg JH7110_SYSCLK_STG_AXIAHB>,
/linux/include/dt-bindings/clock/
H A Dstarfive,jh7110-crg.h25 #define JH7110_SYSCLK_STG_AXIAHB 8 macro
/linux/arch/riscv/boot/dts/starfive/
H A Djh7110.dtsi628 <&syscrg JH7110_SYSCLK_STG_AXIAHB>,
1086 <&syscrg JH7110_SYSCLK_STG_AXIAHB>,