| /linux/tools/perf/pmu-events/arch/s390/cf_z16/ |
| H A D | extended.json | 91 …"PublicDescription": "Increments by one for any cycle where a level-1 cache or level-2 TLB miss is…
434 "PublicDescription": "Increments by one for every SORT LISTS instruction executed."
440 "BriefDescription": "Increments DEFLATE CONVERSION CALL",
441 "PublicDescription": "Increments by one for every DEFLATE CONVERSION CALL instruction executed."
447 "BriefDescription": "Increments completed DEFLATE CONVERSION CALL",
448 …"PublicDescription": "Increments by one for every DEFLATE CONVERSION CALL instruction executed tha…
455 …"PublicDescription": "Increments by one for every Neural Network Processing Assist instruction exe…
462 …"PublicDescription": "Increments by one for every Neural Network Processing Assist instruction exe…
|
| /linux/tools/perf/pmu-events/arch/x86/meteorlake/ |
| H A D | uncore-memory.json | 197 "BriefDescription": "Number of bytes read from DRAM, in 32B chunks. Counter increments by 1 after receiving 32B chunk data.",
205 "BriefDescription": "Total number of read and write byte transfers to/from DRAM, in 32B chunks. Counter increments by 1 after sending or receiving 32B chunk data.",
213 "BriefDescription": "Number of bytes written to DRAM, in 32B chunks. Counter increments by 1 after sending 32B chunk data.",
|
| /linux/tools/perf/pmu-events/arch/s390/cf_z17/ |
| H A D | extended.json | 91 …"PublicDescription": "Increments by one for any cycle where a Level-1 cache or Level-2 TLB miss is…
434 "PublicDescription": "Increments by one for every SORT LISTS (SORTL) instruction executed."
440 "BriefDescription": "Increments DEFLATE CONVERSION CALL",
441 …"PublicDescription": "Increments by one for every DEFLATE CONVERSION CALL (DFLTCC) instruction exe…
447 "BriefDescription": "Increments completed DEFLATE CONVERSION CALL",
448 …"PublicDescription": "Increments by one for every DEFLATE CONVERSION CALL (DFLTCC) instruction exe…
455 …"PublicDescription": "Increments by one for every NEURAL NETWORK PROCESSING ASSIST (NNPA) instruct…
462 …"PublicDescription": "Increments by one for every NEURAL NETWORK PROCESSING ASSIST (NNPA) instruct…
|
| /linux/Documentation/mhi/ |
| H A D | mhi.rst | 110 buffer information, increments the WP to the next element and rings the
137 pointed by RP, increments the RP to the next element and triggers the
209 * Host increments the WP of the corresponding channel transfer ring.
213 * Device increments the RP of the corresponding event ring.
|
| /linux/Documentation/devicetree/bindings/sound/ |
| H A D | cs35l34.txt | 15 increments of 100mV.
29 range starts at 1200mA and goes to a maximum of 3840mA with increments of
|
| H A D | cs35l35.txt | 57 increments of 100mV.
62 Range starts at 1680mA and goes to a maximum of 4480mA with increments of
|
| /linux/drivers/scsi/isci/ |
| H A D | probe_roms.h | 126 * activity in increments of a microsecond, it can be in increments of
134 * These timer values specifies how long a link will remain open in increments
143 * outbound traffic in increments of a microsecond.
|
| /linux/include/linux/platform_data/ |
| H A D | tsl2772.h | 39 * increments. Total integration time is
46 * increments. Total integration time is
|
| /linux/tools/perf/pmu-events/arch/s390/cf_z15/ |
| H A D | extended.json | 105 …"PublicDescription": "Increments by one for any cycle where a level-1 cache or level-2 TLB miss is…
377 "BriefDescription": "Increments DEFLATE CONVERSION CALL",
378 "PublicDescription": "Increments by one for every DEFLATE CONVERSION CALL instruction executed"
384 "BriefDescription": "Increments completed DEFLATE CONVERSION CALL",
385 …"PublicDescription": " Increments by one for every DEFLATE CONVERSION CALL instruction executed th…
|
| /linux/Documentation/mm/ |
| H A D | multigen_lru.rst | 115 increments ``max_seq`` when ``max_seq-min_seq+1`` approaches
118 demotion of cold pages happens consequently when it increments
122 to scan PTEs, and after each iteration, it increments ``max_seq``. For
131 increments ``min_seq`` when ``lrugen->folios[]`` indexed by
|
| /linux/drivers/gpu/drm/i915/ |
| H A D | i915_file_private.h | 93 * Every context ban increments per client ban score. Also
94 * hangs in short succession increments ban score. If ban threshold
|
| /linux/arch/arm/lib/ |
| H A D | copy_template.S | 24 * This loads one word from 'ptr', stores it in 'reg' and increments
31 * in provided registers and increments 'ptr' past those words.
36 * Similar to ldr1w, but it loads a byte and increments 'ptr' one byte.
|
| /linux/lib/ |
| H A D | rcuref.c | 51 * The get() and put() operations do unconditional increments and
55 * If the reference count is saturated or dead, then the increments and
159 * The increments are fully relaxed; these will not provide ordering. The
|
| /linux/drivers/gpu/drm/xe/ |
| H A D | xe_lmtt_ml.c | 124 /* SZ_32G increments */ in lmtt_ml_pte_index()
128 /* SZ_2M increments */ in lmtt_ml_pte_index()
|
| /linux/tools/perf/pmu-events/arch/x86/sapphirerapids/ |
| H A D | uncore-cache.json | 561 "PublicDescription": "Counts the number of times the LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numerous filters available. Note the non-standard filtering equation. This event will count requests that lookup the cache multiple times with multiple increments. One must ALWAYS set umask bit 0 and select a state or states to match. Otherwise, the event will count nothing. CHAFilter0[24:21,17] bits correspond to [FMESI] state.; Filters for any transaction originating from the IPQ or IRQ. This does not include lookups originating from the ISMQ.",
572 "PublicDescription": "Cache Lookups : All transactions from Remote Agents : Counts the number of times the LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numerous filters available. Note the non-standard filtering equation. This event will count requests that lookup the cache multiple times with multiple increments. One must ALWAYS select a state or states (in the umask field) to match. Otherwise, the event will count nothing.",
583 "PublicDescription": "Cache Lookups : All Requests : Counts the number of times the LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numerous filters available. Note the non-standard filtering equation. This event will count requests that lookup the cache multiple times with multiple increments. One must ALWAYS set umask bit 0 and select a state or states to match. Otherwise, the event will count nothing. : Any local or remote transaction to the LLC, including prefetch.",
593 "PublicDescription": "Cache Lookups : CRd Requests : Counts the number of times the LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numerous filters available. Note the non-standard filtering equation. This event will count requests that lookup the cache multiple times with multiple increments. One must ALWAYS set umask bit 0 and select a state or states to match. Otherwise, the event will count nothing. : Local or remote CRd transactions to the LLC. This includes CRd prefetch.",
604 "PublicDescription": "Cache Lookups : CRd Requests : Counts the number of times the LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numerous filters available. Note the non-standard filtering equation. This event will count requests that lookup the cache multiple times with multiple increments. One must ALWAYS set umask bit 0 and select a state or states to match. Otherwise, the event will count nothing. : Local or remote CRd transactions to the LLC. This includes CRd prefetch.",
614 "PublicDescription": "Cache Lookups : Local non-prefetch requests : Counts the number of times the LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numerous filters available. Note the non-standard filtering equation. This event will count requests that lookup the cache multiple times with multiple increments. One must ALWAYS set umask bit 0 and select a state or states to match. Otherwise, the event will count nothing. : Any local transaction to the LLC, not including prefetch",
624 "PublicDescription": "Counts the number of times the LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numerous filters available. Note the non-standard filtering equation. This event will count requests that lookup the cache multiple times with multiple increments. One must ALWAYS set umask bit 0 and select a state or states to match. Otherwise, the event will count nothing. CHAFilter0[24:21,17] bits correspond to [FMESI] state. Read transactions",
635 "PublicDescription": "Cache Lookups : Data Reads : Counts the number of times the LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numerous filters available. Note the non-standard filtering equation. This event will count requests that lookup the cache multiple times with multiple increments. One must ALWAYS select a state or states (in the umask field) to match. Otherwise, the event will count nothing.",
646 "PublicDescription": "Cache Lookups : Data Read Request : Counts the number of times the LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numerous filters available. Note the non-standard filtering equation. This event will count requests that lookup the cache multiple times with multiple increments. One must ALWAYS set umask bit 0 and select a state or states to match. Otherwise, the event will count nothing. : Read transactions.",
656 "PublicDescription": "Cache Lookups : Demand Data Reads, Core and LLC prefetches : Counts the number of times the LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numerous filters available. Note the non-standard filtering equation. This event will count requests that lookup the cache multiple times with multiple increments
[all...] |
| /linux/tools/perf/pmu-events/arch/x86/pantherlake/ |
| H A D | uncore-memory.json | 156 "BriefDescription": "Counts number of bytes read, in 32B chunk, per DDR channel. Counter increments by 1 after receiving 32B chunk data.",
183 "BriefDescription": "Total number of read and write byte transfers to/from DRAM, in 32B chunk, per DDR channel. Counter increments by 1 after sending or receiving 32B chunk data.",
236 "BriefDescription": "Counts number of bytes written, in 32B chunk, per DDR channel. Counter increments by 1 after sending 32B chunk data.",
|
| /linux/tools/perf/pmu-events/arch/x86/emeraldrapids/ |
| H A D | uncore-cache.json | 561 "PublicDescription": "Counts the number of times the LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numerous filters available. Note the non-standard filtering equation. This event will count requests that lookup the cache multiple times with multiple increments. One must ALWAYS set umask bit 0 and select a state or states to match. Otherwise, the event will count nothing. CHAFilter0[24:21,17] bits correspond to [FMESI] state.; Filters for any transaction originating from the IPQ or IRQ. This does not include lookups originating from the ISMQ.",
572 "PublicDescription": "Cache Lookups : All transactions from Remote Agents : Counts the number of times the LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numerous filters available. Note the non-standard filtering equation. This event will count requests that lookup the cache multiple times with multiple increments. One must ALWAYS select a state or states (in the umask field) to match. Otherwise, the event will count nothing.",
583 "PublicDescription": "Cache Lookups : All Requests : Counts the number of times the LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numerous filters available. Note the non-standard filtering equation. This event will count requests that lookup the cache multiple times with multiple increments. One must ALWAYS set umask bit 0 and select a state or states to match. Otherwise, the event will count nothing. : Any local or remote transaction to the LLC, including prefetch.",
593 "PublicDescription": "Cache Lookups : CRd Requests : Counts the number of times the LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numerous filters available. Note the non-standard filtering equation. This event will count requests that lookup the cache multiple times with multiple increments. One must ALWAYS set umask bit 0 and select a state or states to match. Otherwise, the event will count nothing. : Local or remote CRd transactions to the LLC. This includes CRd prefetch.",
604 "PublicDescription": "Cache Lookups : CRd Requests : Counts the number of times the LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numerous filters available. Note the non-standard filtering equation. This event will count requests that lookup the cache multiple times with multiple increments. One must ALWAYS set umask bit 0 and select a state or states to match. Otherwise, the event will count nothing. : Local or remote CRd transactions to the LLC. This includes CRd prefetch.",
614 "PublicDescription": "Cache Lookups : Local non-prefetch requests : Counts the number of times the LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numerous filters available. Note the non-standard filtering equation. This event will count requests that lookup the cache multiple times with multiple increments. One must ALWAYS set umask bit 0 and select a state or states to match. Otherwise, the event will count nothing. : Any local transaction to the LLC, not including prefetch",
624 "PublicDescription": "Counts the number of times the LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numerous filters available. Note the non-standard filtering equation. This event will count requests that lookup the cache multiple times with multiple increments. One must ALWAYS set umask bit 0 and select a state or states to match. Otherwise, the event will count nothing. CHAFilter0[24:21,17] bits correspond to [FMESI] state. Read transactions",
635 "PublicDescription": "Cache Lookups : Data Reads : Counts the number of times the LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numerous filters available. Note the non-standard filtering equation. This event will count requests that lookup the cache multiple times with multiple increments. One must ALWAYS select a state or states (in the umask field) to match. Otherwise, the event will count nothing.",
646 "PublicDescription": "Cache Lookups : Data Read Request : Counts the number of times the LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numerous filters available. Note the non-standard filtering equation. This event will count requests that lookup the cache multiple times with multiple increments. One must ALWAYS set umask bit 0 and select a state or states to match. Otherwise, the event will count nothing. : Read transactions.",
656 "PublicDescription": "Cache Lookups : Demand Data Reads, Core and LLC prefetches : Counts the number of times the LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numerous filters available. Note the non-standard filtering equation. This event will count requests that lookup the cache multiple times with multiple increments
[all...] |
| /linux/arch/riscv/include/asm/ |
| H A D | clint.h | 17 * The ISA defines mtime as a 64-bit memory-mapped register that increments at
|
| /linux/tools/perf/pmu-events/arch/x86/lunarlake/ |
| H A D | uncore-memory.json | 156 "BriefDescription": "Counts number of bytes read, in 32B chunk, per DDR channel. Counter increments by 1 after receiving 32B chunk data.",
161 "PublicDescription": "This counter counts number of bytes read, in 32B chunk, per DDR channel. Counter increments by 1 after receiving 32B chunk data.",
184 "BriefDescription": "Total number of read and write byte transfers to/from DRAM, in 32B chunk, per DDR channel. Counter increments by 1 after sending or receiving 32B chunk data.",
237 "BriefDescription": "Counts number of bytes written, in 32B chunk, per DDR channel. Counter increments by 1 after sending 32B chunk data.",
|
| /linux/Documentation/devicetree/bindings/hwmon/ |
| H A D | amd,sbtsi.yaml | 19 to BMC. The emulated thermal sensor can report temperatures in increments
|
| /linux/Documentation/hwmon/ |
| H A D | sbtsi_temp.rst | 40 registers encode the temperature in increments of 0.125 from 0 to 255.875.
|
| /linux/drivers/char/ |
| H A D | nwbutton.c | 145 * this is the first press, so it starts a timer and increments the counter.
147 * increments the counter.
|
| /linux/Documentation/admin-guide/device-mapper/ |
| H A D | dm-queue-length.rst | 30 dm-queue-length increments/decrements 'in-flight' when an I/O is
|
| /linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| H A D | pptable_v1_0.h | 277 USHORT usPWMMin; /* The minimum PWM value in percent (0.01% increments). */
297 USHORT usPWMMin; /* The minimum PWM value in percent (0.01% increments). */
324 USHORT usPWMMin; /* The minimum PWM value in percent (0.01% increments). */
|
| /linux/tools/perf/pmu-events/arch/x86/goldmontplus/ |
| H A D | other.json | 24 …e number of core cycles during which interrupts are masked (disabled). Increments by 1 each core c…
|