Searched full:iwb (Results 1 – 5 of 5) sorted by relevance
| /linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | arm,gic-v5-iwb.yaml | 4 $id: http://devicetree.org/schemas/interrupt-controller/arm,gic-v5-iwb.yaml#
7 title: ARM Generic Interrupt Controller, version 5 Interrupt Wire Bridge (IWB)
20 GICv5 has zero or more Interrupt Wire Bridges (IWB) that are responsible
28 const: arm,gic-v5-iwb
32 - description: IWB control frame
39 The 1st cell corresponds to the IWB wire.
68 compatible = "arm,gic-v5-iwb";
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| /linux/drivers/irqchip/ |
| H A D | irq-gic-v5-iwb.c | 5 #define pr_fmt(fmt) "GICv5 IWB: " fmt
52 * Enable IWB wire/pin at this point in __gicv5_iwb_set_wire_enable()
159 .name = "GICv5-IWB",
220 dev_err(&pdev->dev, "IWB must be enabled in firmware\n"); in gicv5_iwb_init_bases()
263 { .compatible = "arm,gic-v5-iwb" },
270 .name = "GICv5 IWB",
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| H A D | Makefile | 41 irq-gic-v5-iwb.o
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| /linux/include/linux/irqchip/ |
| H A D | arm-gic-v5.h | 252 * IWB registers
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| /linux/arch/mips/pci/ |
| H A D | ops-tx4927.c | 396 { TX4927_PCIC_PCICSTATUS_IWB, "IWB" }, in tx4927_report_pcic_status1()
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