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/linux/drivers/vfio/platform/
H A Dvfio_platform_irq.c49 if (!(vdev->irqs[index].flags & VFIO_IRQ_INFO_MASKABLE)) in vfio_platform_set_irq_mask()
56 return vfio_virqfd_enable((void *) &vdev->irqs[index], in vfio_platform_set_irq_mask()
59 &vdev->irqs[index].mask, fd); in vfio_platform_set_irq_mask()
61 vfio_virqfd_disable(&vdev->irqs[index].mask); in vfio_platform_set_irq_mask()
66 vfio_platform_mask(&vdev->irqs[index]); in vfio_platform_set_irq_mask()
72 vfio_platform_mask(&vdev->irqs[index]); in vfio_platform_set_irq_mask()
109 if (!(vdev->irqs[index].flags & VFIO_IRQ_INFO_MASKABLE)) in vfio_platform_set_irq_unmask()
116 return vfio_virqfd_enable((void *) &vdev->irqs[index], in vfio_platform_set_irq_unmask()
119 &vdev->irqs[index].unmask, in vfio_platform_set_irq_unmask()
122 vfio_virqfd_disable(&vdev->irqs[index].unmask); in vfio_platform_set_irq_unmask()
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/linux/drivers/bus/fsl-mc/
H A Dfsl-mc-allocator.c347 * ID. A block of IRQs is pre-allocated and maintained in a pool
353 * It allocates a block of IRQs from the GIC-ITS.
415 * It frees the IRQs that were allocated to the pool, back to the GIC-ITS.
441 * Allocate the IRQs required by a given fsl-mc device.
449 struct fsl_mc_device_irq **irqs = NULL; in fsl_mc_allocate_irqs() local
453 if (mc_dev->irqs) in fsl_mc_allocate_irqs()
471 "Not able to allocate %u irqs for device\n", irq_count); in fsl_mc_allocate_irqs()
475 irqs = devm_kcalloc(&mc_dev->dev, irq_count, sizeof(irqs[0]), in fsl_mc_allocate_irqs()
477 if (!irqs) in fsl_mc_allocate_irqs()
488 irqs[i] = to_fsl_mc_irq(resource); in fsl_mc_allocate_irqs()
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/linux/include/linux/mfd/
H A Drohm-bd96801.h78 /* ERRB IRQs */
80 /* Reg 0x52, 0x53, 0x54 - ERRB system IRQs */
101 /* Reg 0x55 BUCK1 ERR IRQs */
107 /* Reg 0x56 BUCK2 ERR IRQs */
113 /* Reg 0x57 BUCK3 ERR IRQs */
119 /* Reg 0x58 BUCK4 ERR IRQs */
125 /* Reg 0x59 LDO5 ERR IRQs */
131 /* Reg 0x5a LDO6 ERR IRQs */
137 /* Reg 0x5b LDO7 ERR IRQs */
144 /* INTB IRQs */
H A Drohm-bd96802.h9 * IRQs.
15 /* ERRB IRQs */
17 /* Reg 0x52, 0x53, 0x54 - ERRB system IRQs */
36 /* Reg 0x55 BUCK1 ERR IRQs */
42 /* Reg 0x56 BUCK2 ERR IRQs */
49 /* INTB IRQs */
/linux/drivers/gpio/
H A Dgpio-davinci.c62 int irqs[MAX_INT_PER_BANK]; member
199 dev_err(dev, "Too many IRQs!\n"); in davinci_gpio_probe()
212 chips->irqs[i] = platform_get_irq(pdev, i); in davinci_gpio_probe()
213 if (chips->irqs[i] < 0) in davinci_gpio_probe()
214 return chips->irqs[i]; in davinci_gpio_probe()
255 * We expect irqs will normally be set up as input pins, but they can also be
339 /* ack any irqs */ in gpio_irq_handler()
377 * NOTE: we assume for now that only irqs in the first gpio_chip in gpio_to_irq_unbanked()
378 * can provide direct-mapped IRQs to AINTC (up to 32 GPIOs). in gpio_to_irq_unbanked()
381 return d->irqs[offset]; in gpio_to_irq_unbanked()
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H A Dgpio-reg.c28 const int *irqs; member
114 int irq = r->irqs[offset]; in gpio_reg_to_irq()
132 * @irqs: array of %num ints describing the interrupt mapping for each
145 const char *const *names, struct irq_domain *irqdom, const int *irqs) in gpio_reg_init() argument
167 if (irqs) in gpio_reg_init()
175 r->irqs = irqs; in gpio_reg_init()
/linux/drivers/base/
H A Dauxiliary_sysfs.c21 .name = "irqs",
38 xa_init(&auxdev->sysfs.irqs); in auxiliary_irq_dir_prepare()
51 * unique irqs of the auxiliary devices. The driver must not invoke this API
73 ret = xa_insert(&auxdev->sysfs.irqs, irq, info, GFP_KERNEL); in auxiliary_device_sysfs_irq_add()
83 xa_store(&auxdev->sysfs.irqs, irq, no_free_ptr(info), GFP_KERNEL); in auxiliary_device_sysfs_irq_add()
87 xa_erase(&auxdev->sysfs.irqs, irq); in auxiliary_device_sysfs_irq_add()
102 struct auxiliary_irq_info *info __free(kfree) = xa_load(&auxdev->sysfs.irqs, irq); in auxiliary_device_sysfs_irq_remove()
111 xa_erase(&auxdev->sysfs.irqs, irq); in auxiliary_device_sysfs_irq_remove()
/linux/drivers/irqchip/
H A Dirq-bcm6345-l1.c19 * 0x1000_0028: CPU0_W0_STATUS IRQs 31-63
20 * 0x1000_002c: CPU0_W1_STATUS IRQs 0-31
23 * 0x1000_0038: CPU1_W0_STATUS IRQs 31-63
24 * 0x1000_003c: CPU1_W1_STATUS IRQs 0-31
31 * 0x1000_0030: CPU0_W0_STATUS IRQs 96-127
32 * 0x1000_0034: CPU0_W1_STATUS IRQs 64-95
33 * 0x1000_0038: CPU0_W2_STATUS IRQs 32-63
34 * 0x1000_003c: CPU0_W3_STATUS IRQs 0-31
39 * 0x1000_0050: CPU1_W0_STATUS IRQs 96-127
40 * 0x1000_0054: CPU1_W1_STATUS IRQs 64-95
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H A Dirq-nvic.c33 * Each bank handles 32 irqs. Only the 16th (= last) bank handles only
34 * 16 irqs.
76 unsigned int irqs, i, numbanks; in nvic_of_init() local
89 irqs = numbanks * 32; in nvic_of_init()
90 if (irqs > NVIC_MAX_IRQ) in nvic_of_init()
91 irqs = NVIC_MAX_IRQ; in nvic_of_init()
94 irq_domain_create_linear(of_fwnode_handle(node), irqs, &nvic_irq_domain_ops, NULL); in nvic_of_init()
131 for (i = 0; i < irqs; i += 4) in nvic_of_init()
H A Dirq-ingenic-tcu.c93 int ret, irqs; in ingenic_tcu_irq_init() local
105 irqs = of_property_count_elems_of_size(np, "interrupts", sizeof(u32)); in ingenic_tcu_irq_init()
106 if (irqs < 0 || irqs > ARRAY_SIZE(tcu->parent_irqs)) { in ingenic_tcu_irq_init()
112 tcu->nb_parent_irqs = irqs; in ingenic_tcu_irq_init()
143 /* Mask all IRQs by default */ in ingenic_tcu_irq_init()
156 for (i = 0; i < irqs; i++) { in ingenic_tcu_irq_init()
/linux/drivers/pcmcia/
H A Dsa1111_generic.c141 int i, ret = 0, irqs[NUM_IRQS]; in sa1111_pcmcia_add() local
148 irqs[i] = sa1111_get_irq(dev, i); in sa1111_pcmcia_add()
149 if (irqs[i] <= 0) in sa1111_pcmcia_add()
150 return irqs[i] ? : -ENXIO; in sa1111_pcmcia_add()
166 s->soc.socket.pci_irq = irqs[IDX_IRQ_S1_READY_NINT]; in sa1111_pcmcia_add()
167 s->soc.stat[SOC_STAT_CD].irq = irqs[IDX_IRQ_S1_CD_VALID]; in sa1111_pcmcia_add()
169 s->soc.stat[SOC_STAT_BVD1].irq = irqs[IDX_IRQ_S1_BVD1_STSCHG]; in sa1111_pcmcia_add()
172 s->soc.socket.pci_irq = irqs[IDX_IRQ_S0_READY_NINT]; in sa1111_pcmcia_add()
173 s->soc.stat[SOC_STAT_CD].irq = irqs[IDX_IRQ_S0_CD_VALID]; in sa1111_pcmcia_add()
175 s->soc.stat[SOC_STAT_BVD1].irq = irqs[IDX_IRQ_S0_BVD1_STSCHG]; in sa1111_pcmcia_add()
/linux/sound/soc/sdca/
H A Dsdca_interrupts.c75 .irqs = regmap_irqs,
267 info->irqs[sdca_irq].irq = irq; in sdca_irq_request_locked()
285 info->irqs[sdca_irq].irq = 0; in sdca_irq_free_locked()
407 if (info->irqs[irq].irq) { in get_interrupt_data()
412 return &info->irqs[irq]; in get_interrupt_data()
510 * sdca_irq_populate - Request all the individual IRQs for an SDCA Function
529 struct sdca_interrupt *interrupt = &info->irqs[i]; in sdca_irq_populate()
573 struct sdca_interrupt *interrupt = &info->irqs[i]; in sdca_irq_cleanup_flags()
593 * sdca_irq_cleanup - Free the regular IRQs for an SDCA Function
610 * sdca_irq_cleanup_late - Free the early IRQs for an SDCA Function
[all …]
/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dst,stih407-irq-syscfg.yaml7 title: STMicroelectronics STi System Configuration Controlled IRQs
14 Management), and PL310 L2 Cache IRQs are controlled using System
26 description: Array of IRQs to enable.
40 description: External IRQs can be inverted at will. This property inverts
41 these three IRQs using bitwise logic, each one being encoded respectively
/linux/Documentation/power/
H A Dsuspend-and-interrupts.rst9 Suspending and Resuming Device IRQs
12 Device interrupt request lines (IRQs) are generally disabled during system
21 interrupt handlers for shared IRQs that device drivers implementing them were
29 Device IRQs are re-enabled during system resume, right before the "early" phase
91 not executed for system wakeup IRQs. They are only executed for IRQF_NO_SUSPEND
92 IRQs at that time, but those IRQs should not be configured for system wakeup
126 Second, both enable_irq_wake() and IRQF_NO_SUSPEND apply to entire IRQs and not
133 must be able to discern spurious IRQs from genuine wakeup events (signalling
/linux/arch/arc/kernel/
H A Dintc-arcv2.c17 unsigned int pad:3, firq:1, prio:4, exts:8, irqs:8, ver:8; member
19 unsigned int ver:8, irqs:8, exts:8, prio:4, firq:1, pad:3;
61 * Linux by default uses lower prio 1 for most irqs, reserving 0 for in arc_init_IRQ()
79 for (i = NR_EXCEPTIONS; i < irq_bcr.irqs + NR_EXCEPTIONS; i++) { in arc_init_IRQ()
84 * Only mask cpu private IRQs here. in arc_init_IRQ()
136 * core intc IRQs [16, 23]: in arcv2_irq_map()
168 nr_cpu_irqs = irq_bcr.irqs + NR_EXCEPTIONS; in init_onchip_IRQ()
H A Dintc-compact.c22 * -Optionally, setup the High priority Interrupts as Level 2 IRQs
32 * Write to register, even if no LV2 IRQs configured to reset it in arc_init_IRQ()
59 * To reduce platform code, we assume all IRQs directly hooked-up into intc.
60 * Platforms with external intc, hence cascaded IRQs, are free to over-ride
146 * soft ISR are low priority jobs which can be very slow, thus all IRQs
149 * still we must re-enable both L1 and L2 IRQs
/linux/arch/powerpc/platforms/ps3/
H A Dspu.c247 0, &spu->irqs[0]); in setup_interrupts()
253 1, &spu->irqs[1]); in setup_interrupts()
259 2, &spu->irqs[2]); in setup_interrupts()
267 ps3_spe_irq_destroy(spu->irqs[1]); in setup_interrupts()
269 ps3_spe_irq_destroy(spu->irqs[0]); in setup_interrupts()
271 spu->irqs[0] = spu->irqs[1] = spu->irqs[2] = 0; in setup_interrupts()
317 ps3_spe_irq_destroy(spu->irqs[2]); in ps3_destroy_spu()
318 ps3_spe_irq_destroy(spu->irqs[1]); in ps3_destroy_spu()
319 ps3_spe_irq_destroy(spu->irqs[0]); in ps3_destroy_spu()
321 spu->irqs[0] = spu->irqs[1] = spu->irqs[2] = 0; in ps3_destroy_spu()
/linux/arch/arm/mach-sa1100/include/mach/
H A Dirqs.h3 * arch/arm/mach-sa1100/include/mach/irqs.h
9 * 2001/11/14 RMK Cleaned up and standardised a lot of the IRQs.
78 * within sensible limits. IRQs 61 to 76 are available.
87 * allocate their IRQs above NR_IRQS.
89 * LoCoMo has 4 additional IRQs, but is not sparse IRQ aware, and so has
/linux/drivers/net/ethernet/intel/ice/
H A Dice_irq.c240 * ice_virt_get_irqs - get irqs for SR-IOV usacase
242 * @needed: number of irqs to get
249 * use this irqs
267 * ice_virt_free_irqs - free irqs used by the VF
270 * @irqs: number of irqs to free
272 void ice_virt_free_irqs(struct ice_pf *pf, u32 index, u32 irqs) in ice_virt_free_irqs() argument
275 irqs); in ice_virt_free_irqs()
/linux/Documentation/arch/arm/
H A Dinterrupts.rst18 The 2.5 kernels will be having major changes to the way IRQs are handled.
39 SA1111 IRQ handler, SA1111 IRQs can hold off SMC9196 IRQs indefinitely.
50 SA11x0 IRQs are handled by two separate "chip" structures, one for
81 - required. May be the same function as mask for IRQs
89 IRQs that use this 'irqchip'. Generally expected to re-trigger
167 hardware based. Mixing level-based and edge-based IRQs on the same
/linux/drivers/mfd/
H A Dtps65912-core.c24 /* INT_STS IRQs */
33 /* INT_STS2 IRQs */
42 /* INT_STS3 IRQs */
51 /* INT_STS4 IRQs */
62 .irqs = tps65912_irqs,
/linux/tools/testing/selftests/kvm/s390/
H A Dresets.c71 int irqs; in assert_noirq() local
75 irqs = __vcpu_ioctl(vcpu, KVM_S390_GET_IRQ_STATE, &irq_state); in assert_noirq()
77 * irqs contains the number of retrieved interrupts. Any interrupt in assert_noirq()
81 TEST_ASSERT(irqs >= 0, "Could not fetch IRQs: errno %d", errno); in assert_noirq()
82 TEST_ASSERT(!irqs, "IRQ pending"); in assert_noirq()
194 int irqs; in inject_irq() local
201 irqs = __vcpu_ioctl(vcpu, KVM_S390_SET_IRQ_STATE, &irq_state); in inject_irq()
202 TEST_ASSERT(irqs >= 0, "Error injecting EMERGENCY IRQ errno %d", errno); in inject_irq()
/linux/arch/arm/boot/dts/marvell/
H A Dmmp3.dtsi54 mrvl,intc-nr-irqs = <64>;
64 mrvl,intc-nr-irqs = <4>;
74 mrvl,intc-nr-irqs = <2>;
84 mrvl,intc-nr-irqs = <3>;
94 mrvl,intc-nr-irqs = <3>;
104 mrvl,intc-nr-irqs = <5>;
114 mrvl,intc-nr-irqs = <2>;
124 mrvl,intc-nr-irqs = <2>;
134 mrvl,intc-nr-irqs = <31>;
144 mrvl,intc-nr-irqs = <2>;
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/linux/drivers/fpga/
H A Dsocfpga.c253 static void socfpga_fpga_enable_irqs(struct socfpga_fpga_priv *priv, u32 irqs) in socfpga_fpga_enable_irqs() argument
255 /* set irqs to level sensitive */ in socfpga_fpga_enable_irqs()
259 socfpga_fpga_writel(priv, SOCFPGA_FPGMGR_GPIO_INT_POL_OFST, irqs); in socfpga_fpga_enable_irqs()
261 /* clear irqs */ in socfpga_fpga_enable_irqs()
262 socfpga_fpga_writel(priv, SOCFPGA_FPGMGR_GPIO_PORTA_EOI_OFST, irqs); in socfpga_fpga_enable_irqs()
268 socfpga_fpga_writel(priv, SOCFPGA_FPGMGR_GPIO_INTEN_OFST, irqs); in socfpga_fpga_enable_irqs()
279 u32 irqs, st; in socfpga_fpga_isr() local
282 /* clear irqs */ in socfpga_fpga_isr()
283 irqs = socfpga_fpga_raw_readl(priv, SOCFPGA_FPGMGR_GPIO_INTSTAT_OFST); in socfpga_fpga_isr()
285 socfpga_fpga_raw_writel(priv, SOCFPGA_FPGMGR_GPIO_PORTA_EOI_OFST, irqs); in socfpga_fpga_isr()
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/linux/drivers/pci/hotplug/
H A Dcpqphp_ctrl.c1524 res_lists.irqs = NULL; in board_added()
2331 struct irq_mapping irqs; in configure_new_function() local
2411 if (!resources->irqs) { in configure_new_function()
2412 irqs.barber_pole = 0; in configure_new_function()
2413 irqs.interrupt[0] = 0; in configure_new_function()
2414 irqs.interrupt[1] = 0; in configure_new_function()
2415 irqs.interrupt[2] = 0; in configure_new_function()
2416 irqs.interrupt[3] = 0; in configure_new_function()
2417 irqs.valid_INT = 0; in configure_new_function()
2419 irqs.barber_pole = resources->irqs->barber_pole; in configure_new_function()
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