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/linux/drivers/pci/
H A Dirq.c83 * pci_swizzle_interrupt_pin - swizzle INTx for device behind bridge
85 * @pin: the INTx pin (1=INTA, 2=INTB, 3=INTC, 4=INTD)
87 * Perform INTx swizzling for a device behind one level of bridge. This is
122 * pci_common_swizzle - swizzle INTx all the way to root bridge
124 * @pinp: pointer to the INTx pin value (1=INTA, 2=INTB, 3=INTD, 4=INTD)
126 * Perform INTx swizzling for a device. This traverses through all PCI-to-PCI
236 * pci_check_and_mask_intx - mask INTx on pending interrupt
239 * Check if the device dev has its INTx line asserted, mask it and return
249 * pci_check_and_unmask_intx - unmask INTx if no interrupt is pending
252 * Check if the device dev has its INTx line asserted, unmask it if not and
/linux/Documentation/PCI/
H A Dboot-interrupts.rst20 protocol describes this in-band legacy wire-interrupt INTx mechanism for
22 describe problems with the Core IO handling of INTx message routing to the
29 When in-band legacy INTx messages are forwarded to the PCH, they in turn
103 When this bit is set. Local INTx messages received from the
110 has been to make use of PCI Interrupt pin to INTx routing tables for
112 line by default. Therefore, on chipsets where this INTx routing cannot be
147 2.15.2 PCI Express Legacy INTx Support and Boot Interrupt
/linux/drivers/pci/controller/
H A Dpcie-rockchip-ep.c33 * @irq_phys_addr: base address on the AXI bus where the MSI/INTX IRQ
36 * the sending of a memory write (MSI) / normal message (INTX
38 * @irq_pci_addr: used to save the current mapping of the MSI/INTX IRQ
41 * the MSI/INTX IRQ dedicated outbound region.
42 * @irq_pending: bitmask of asserted INTX IRQs.
349 u8 intx, bool do_assert) in rockchip_pcie_ep_assert_intx() argument
353 intx &= 3; in rockchip_pcie_ep_assert_intx()
356 ep->irq_pending |= BIT(intx); in rockchip_pcie_ep_assert_intx()
362 ep->irq_pending &= ~BIT(intx); in rockchip_pcie_ep_assert_intx()
371 u8 intx) in rockchip_pcie_ep_send_intx_irq() argument
[all …]
H A Dpcie-xilinx-dma-pl.c46 IMR(INTX) | \
113 * @intx_irq: INTx error interrupt number
250 .name = "pl_dma:INTx",
265 /* INTx IRQ Domain operations */
497 * INTx error interrupts are Xilinx controller specific interrupt, used to
574 /* Setup INTx */ in xilinx_pl_dma_pcie_init_irq_domain()
591 dev_err(dev, "Failed to get a INTx IRQ domain\n"); in xilinx_pl_dma_pcie_init_irq_domain()
644 dev_err(dev, "Failed to map INTx interrupt\n"); in xilinx_pl_dma_pcie_setup_irq()
651 dev_err(dev, "Failed to request INTx IRQ %d\n", port->intx_irq); in xilinx_pl_dma_pcie_setup_irq()
H A Dpcie-xilinx-cpm.c55 IMR(INTX) | \
188 .name = "INTx",
194 * xilinx_cpm_pcie_intx_map - Set the handler for the INTx and mark IRQ as valid
212 /* INTx IRQ Domain operations */
391 /* Setup INTx */ in xilinx_cpm_pcie_init_irq_domain()
457 dev_err(dev, "Failed to map INTx interrupt\n"); in xilinx_cpm_setup_irq()
461 /* Plug the INTx chained handler */ in xilinx_cpm_setup_irq()
H A Dpcie-xilinx.c203 * the respective callbacks for INTx and MSI. in xilinx_msi_top_irq_ack()
310 /* INTx Functions */
313 * xilinx_pcie_intx_map - Set the handler for the INTx and mark IRQ as valid
329 /* INTx IRQ Domain operations */
463 /* Setup INTx */ in xilinx_pcie_init_irq_domain()
474 dev_err(dev, "Failed to get a INTx IRQ domain\n"); in xilinx_pcie_init_irq_domain()
H A Dpci-mvebu.c324 /* Check if "intx" interrupt was specified in DT. */ in mvebu_pcie_setup_hw()
329 * Fallback code when "intx" interrupt was not specified in DT: in mvebu_pcie_setup_hw()
330 * Unmask all legacy INTx interrupts as driver does not provide a way in mvebu_pcie_setup_hw()
331 * for masking and unmasking of individual legacy INTx interrupts. in mvebu_pcie_setup_hw()
332 * Legacy INTx are reported via one shared GIC source and therefore in mvebu_pcie_setup_hw()
333 * kernel cannot distinguish which individual legacy INTx was triggered. in mvebu_pcie_setup_hw()
1046 .name = "mvebu-INTx",
1086 dev_err(dev, "Failed to get INTx IRQ domain for %s\n", port->name); in mvebu_pcie_init_irq_domain()
1107 /* Process legacy INTx interrupts */ in mvebu_pcie_irq_handler()
1294 * Old DT bindings do not contain "intx" interrupt in mvebu_pcie_parse_port()
[all …]
/linux/drivers/pci/msi/
H A Dapi.c44 * free earlier allocated interrupt vectors, and restore INTx emulation.
186 * free earlier-allocated interrupt vectors, and restore INTx.
214 * * %PCI_IRQ_INTX Allow trying INTx interrupts, if and
222 * higher precedence over legacy INTx emulation.
280 /* use INTx IRQ if allowed */ in pci_alloc_irq_vectors_affinity()
307 * * INTx must be 0
331 * * INTx must be 0
338 * during system boot if the device is in legacy INTx mode.
/linux/arch/arm/boot/dts/marvell/
H A Darmada-xp-mv78460.dtsi122 interrupt-names = "intx";
150 interrupt-names = "intx";
178 interrupt-names = "intx";
206 interrupt-names = "intx";
234 interrupt-names = "intx";
262 interrupt-names = "intx";
290 interrupt-names = "intx";
318 interrupt-names = "intx";
346 interrupt-names = "intx";
374 interrupt-names = "intx";
H A Darmada-xp-mv78260.dtsi101 interrupt-names = "intx";
129 interrupt-names = "intx";
157 interrupt-names = "intx";
185 interrupt-names = "intx";
213 interrupt-names = "intx";
241 interrupt-names = "intx";
269 interrupt-names = "intx";
297 interrupt-names = "intx";
325 interrupt-names = "intx";
H A Darmada-385.dtsi72 interrupt-names = "intx";
100 interrupt-names = "intx";
128 interrupt-names = "intx";
159 interrupt-names = "intx";
H A Darmada-xp-mv78230.dtsi86 interrupt-names = "intx";
114 interrupt-names = "intx";
142 interrupt-names = "intx";
170 interrupt-names = "intx";
198 interrupt-names = "intx";
H A Darmada-380.dtsi67 interrupt-names = "intx";
96 interrupt-names = "intx";
125 interrupt-names = "intx";
/linux/drivers/net/ethernet/cisco/enic/
H A Dvnic_enet.h48 #define VENET_INTR_MODE_ANY 0 /* Try MSI-X, then MSI, then INTx */
49 #define VENET_INTR_MODE_MSI 1 /* Try MSI then INTx */
50 #define VENET_INTR_MODE_INTX 2 /* Try INTx only */
H A Denic_res.c103 c->intr_mode == VENET_INTR_MODE_INTX ? "INTx" : in enic_get_vnic_config()
267 * All CQs point to INTR[0] for INTx, MSI in enic_init_vnic_resources()
297 * mask_on_assertion is not used for INTx due to the level- in enic_init_vnic_resources()
298 * triggered nature of INTx in enic_init_vnic_resources()
332 intr_mode == VNIC_DEV_INTR_MODE_INTX ? "legacy PCI INTx" : in enic_alloc_vnic_resources()
/linux/drivers/pci/controller/dwc/
H A Dpcie-amd-mdb.c58 * @intx_domain: INTx IRQ domain pointer
61 * @intx_irq: INTx IRQ interrupt number
116 .name = "AMD MDB INTx",
122 * amd_mdb_pcie_intx_map - Set the handler for the INTx and mark IRQ as valid
140 /* INTx IRQ domain operations. */
310 dev_err(dev, "Failed to add INTx domain\n"); in amd_mdb_pcie_init_irq_domains()
384 dev_err(dev, "Failed to map INTx interrupt\n"); in amd_mdb_setup_irq()
391 dev_err(dev, "Failed to request INTx IRQ %d, err=%d\n", in amd_mdb_setup_irq()
H A Dpcie-sophgo.c98 .name = "INTx",
132 dev_err(dev, "failed to get INTx irq number\n"); in sophgo_pcie_init_irq_domain()
141 dev_err(dev, "failed to get a INTx irq domain\n"); in sophgo_pcie_init_irq_domain()
H A Dpcie-uniphier-ep.c69 /* assertion time of INTx in usec */
222 * This makes pulse signal to send INTx to the RC, so this should in uniphier_pcie_ep_raise_intx_irq()
226 /* assert INTx */ in uniphier_pcie_ep_raise_intx_irq()
233 /* deassert INTx */ in uniphier_pcie_ep_raise_intx_irq()
/linux/drivers/pci/controller/mobiveil/
H A Dpcie-mobiveil-host.c96 * The core provides a single interrupt for both INTx/MSI messages. in mobiveil_pcie_isr()
97 * So we'll read both INTx and MSI status in mobiveil_pcie_isr()
102 /* read INTx status */ in mobiveil_pcie_isr()
107 /* Handle INTx */ in mobiveil_pcie_isr()
335 .name = "mobiveil_pcie:intx",
342 /* routine to setup the INTx related data */
352 /* INTx domain operations structure */
467 /* setup INTx */ in mobiveil_pcie_init_irq_domain()
471 dev_err(dev, "Failed to get a INTx IRQ domain\n"); in mobiveil_pcie_init_irq_domain()
/linux/drivers/scsi/csiostor/
H A Dcsio_isr.c78 * and INTx handlers.
126 * csio_fwevt_isr() - INTx wrapper for handling FW events.
209 * This routine is shared b/w MSIX and INTx.
277 * csio_scsi_intx_handler() - SCSI INTx handler
281 * This is the top level SCSI INTx handler. Calls csio_scsi_isr_handler()
295 * csio_fcoe_isr() - INTx/MSI interrupt service routine for FCoE.
329 /* Get the INTx Forward interrupt IQ. */ in csio_fcoe_isr()
556 /* Try MSIX, then MSI or fall back to INTx */ in csio_intr_enable()
580 ((hw->intr_mode == CSIO_IM_MSI) ? "MSI" : "INTx")); in csio_intr_enable()
/linux/drivers/pci/controller/cadence/
H A Dpcie-cadence-ep.c325 static void cdns_pcie_ep_assert_intx(struct cdns_pcie_ep *ep, u8 fn, u8 intx, in cdns_pcie_ep_assert_intx() argument
334 intx &= 3; in cdns_pcie_ep_assert_intx()
347 ep->irq_pending |= BIT(intx); in cdns_pcie_ep_assert_intx()
348 msg_code = PCIE_MSG_CODE_ASSERT_INTA + intx; in cdns_pcie_ep_assert_intx()
350 ep->irq_pending &= ~BIT(intx); in cdns_pcie_ep_assert_intx()
351 msg_code = PCIE_MSG_CODE_DEASSERT_INTA + intx; in cdns_pcie_ep_assert_intx()
368 u8 intx) in cdns_pcie_ep_send_intx_irq() argument
376 cdns_pcie_ep_assert_intx(ep, fn, intx, true); in cdns_pcie_ep_send_intx_irq()
381 cdns_pcie_ep_assert_intx(ep, fn, intx, false); in cdns_pcie_ep_send_intx_irq()
548 dev_err(dev, "Cannot raise INTX interrupts for VF\n"); in cdns_pcie_ep_raise_irq()
H A Dpcie-cadence.h319 * @irq_phys_addr: base address on the AXI bus where the MSI/INTX IRQ
322 * the sending of a memory write (MSI) / normal message (INTX
324 * @irq_pci_addr: used to save the current mapping of the MSI/INTX IRQ
327 * the MSI/INTX IRQ dedicated outbound region.
328 * @irq_pending: bitmask of asserted INTX IRQs.
346 /* protect writing to PCI_STATUS while raising INTX interrupts */
/linux/drivers/pci/controller/plda/
H A Dpcie-plda-host.c195 dev_err_ratelimited(dev, "bad INTx IRQ %d\n", in plda_handle_intx()
243 .name = "PLDA PCIe INTx",
272 /* INTx events */ in plda_get_events()
388 /* Setup INTx */ in plda_pcie_init_irq_domains()
409 dev_err(dev, "failed to get an INTx IRQ domain\n"); in plda_pcie_init_irq_domains()
469 dev_err(dev, "failed to map INTx interrupt\n"); in plda_init_interrupts()
473 /* Plug the INTx chained handler */ in plda_init_interrupts()
/linux/drivers/net/ethernet/amd/pds_core/
H A Dcore.c109 qcq->intx == PDS_CORE_INTR_INDEX_NOT_ASSIGNED) in pdsc_qcq_intr_free()
112 pdsc_intr_free(pdsc, qcq->intx); in pdsc_qcq_intr_free()
113 qcq->intx = PDS_CORE_INTR_INDEX_NOT_ASSIGNED; in pdsc_qcq_intr_free()
122 qcq->intx = PDS_CORE_INTR_INDEX_NOT_ASSIGNED; in pdsc_qcq_intr_alloc()
131 qcq->intx = index; in pdsc_qcq_intr_alloc()
353 cidi.intr_index = cpu_to_le16(pdsc->adminqcq.intx); in pdsc_core_init()
498 pds_core_intr_mask(&pdsc->intr_ctrl[pdsc->adminqcq.intx], in pdsc_start()
/linux/include/xen/interface/hvm/
H A Dparams.h28 * val[55:0] is a delivery PCI INTx line:
29 * Domain = val[47:32], Bus = val[31:16] DevFn = val[15:8], IntX = val[1:0]

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