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/freebsd/crypto/openssl/crypto/des/asm/
H A Ddes_enc.m41 ! Copyright 2000-2018 The OpenSSL Project Authors. All Rights Reserved.
8 ! To expand the m4 macros: m4 -B 8192 des_enc.m4 > des_enc.S
15 ! Assemble through gcc: gcc -c -mcpu=ultrasparc -o des_enc.o des_enc.S
17 ! Assemble through cc: cc -c -xarch=v8plusa -o des_enc.o des_enc.S
21 ! 32-bit build:
22 ! 23% faster than cc-5.2 -xarch=v8plus -xO5
23 ! 115% faster than gcc-3.2.1 -m32 -mcpu=ultrasparc -O5
24 ! 64-bit build:
25 ! 50% faster than cc-5.2 -xarch=v9 -xO5
26 ! 100% faster than gcc-3.2.1 -m64 -mcpu=ultrasparc -O5
[all …]
/freebsd/crypto/openssl/providers/implementations/rands/
H A Ddrbg_hmac.c2 * Copyright 2011-2024 The OpenSSL Project Authors. All Rights Reserved.
44 * Called twice by SP800-90Ar1 10.1.2.2 HMAC_DRBG_Update_Process.
48 * in1, in2, in3 are optional inputs that can be NULL.
52 * hmac->K = HMAC(hmac->K, hmac->V || inbyte || [in1] || [in2] || [in3])
53 * hmac->
59 do_hmac(PROV_DRBG_HMAC * hmac,unsigned char inbyte,const unsigned char * in1,size_t in1len,const unsigned char * in2,size_t in2len,const unsigned char * in3,size_t in3len) do_hmac() argument
60 do_hmac(PROV_DRBG_HMAC * hmac,unsigned char inbyte,const unsigned char * in1,size_t in1len,const unsigned char * in2,size_t in2len,const unsigned char * in3,size_t in3len) do_hmac() argument
96 drbg_hmac_update(PROV_DRBG * drbg,const unsigned char * in1,size_t in1len,const unsigned char * in2,size_t in2len,const unsigned char * in3,size_t in3len) drbg_hmac_update() argument
97 drbg_hmac_update(PROV_DRBG * drbg,const unsigned char * in1,size_t in1len,const unsigned char * in2,size_t in2len,const unsigned char * in3,size_t in3len) drbg_hmac_update() argument
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H A Ddrbg_hash.c2 * Copyright 2011-2024 The OpenSSL Project Authors. All Rights Reserved.
38 /* 888 bits from SP800-90Ar1 10.1 table 2 */
41 /* 440 bits from SP800-90Ar1 10.1 table 2 */
59 * SP800-90Ar1 10.3.1 Derivation function using a Hash Function (Hash_df).
61 * inbyte - An optional leading byte (ignore if equal to INBYTE_IGNORE)
62 * in - input string 1 (A Non NULL value).
63 * in2 - optional input string (Can be NULL).
64 * in3 - optiona
70 hash_df(PROV_DRBG * drbg,unsigned char * out,const unsigned char inbyte,const unsigned char * in,size_t inlen,const unsigned char * in2,size_t in2len,const unsigned char * in3,size_t in3len) hash_df() argument
71 hash_df(PROV_DRBG * drbg,unsigned char * out,const unsigned char inbyte,const unsigned char * in,size_t inlen,const unsigned char * in2,size_t in2len,const unsigned char * in3,size_t in3len) hash_df() argument
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H A Ddrbg_ctr.c2 * Copyright 2011-2024 The OpenSSL Project Authors. All Rights Reserved.
37 * The state of a DRBG AES-CTR.
56 * Implementation of NIST SP 800-90A CTR DRBG.
60 unsigned char *p = &ctr->V[0]; in inc_128()
64 --n; in inc_128()
82 n = inlen < ctr->keylen ? inlen : ctr->keylen; in ctr_XOR()
84 ctr->K[i] ^= in[i]; in ctr_XOR()
85 if (inlen <= ctr->keyle in ctr_XOR()
198 ctr_df(PROV_DRBG_CTR * ctr,const unsigned char * in1,size_t in1len,const unsigned char * in2,size_t in2len,const unsigned char * in3,size_t in3len) ctr_df() argument
199 ctr_df(PROV_DRBG_CTR * ctr,const unsigned char * in1,size_t in1len,const unsigned char * in2,size_t in2len,const unsigned char * in3,size_t in3len) ctr_df() argument
261 ctr_update(PROV_DRBG * drbg,const unsigned char * in1,size_t in1len,const unsigned char * in2,size_t in2len,const unsigned char * nonce,size_t noncelen) ctr_update() argument
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/freebsd/crypto/openssl/crypto/modes/asm/
H A Dghashp8-ppc.pl2 # Copyright 2014-2020 The OpenSSL Project Authors. All Rights Reserved.
24 # version is ~2.1x slower than hardware-assisted AES-128-CTR, ~12x
25 # faster than "4-bit" integer-only compiler-generated 64-bit code.
32 # aggregated reduction - by 170% or 2.7x (resulting in 0.55 cpb).
59 $FRAME=6*$SIZE_T+13*16; # 13*16 is for v20-v31 offload
62 ( $xlate="${dir}ppc-xlate.pl" and -f $xlate ) or
63 ( $xlate="${dir}../../perlasm/ppc-xlate.pl" and -f $xlate) or
64 die "can't locate ppc-xlate.pl";
84 li r0,-4096
92 vspltisb $xC2,-16 # 0xf0
[all …]
/freebsd/crypto/openssl/crypto/poly1305/asm/
H A Dpoly1305-sparcv9.pl2 # Copyright 2016-2021 The OpenSSL Project Authors. All Rights Reserved.
31 # (*) Comparison to compiler-generated code is really problematic,
34 # improvement on T4 for gcc-4.6. Well, in T4 case it's a bit
37 # (**) Pre-III performance should be even worse; floating-point
38 # performance for UltraSPARC I-IV on the other hand is reported
39 # to be 4.25 for hand-coded assembly, but they are just too old
41 # (***) Multi-process benchmark saturates at ~12.5x single-process
42 # result on 8-core processor, or ~21GBps per 2.85GHz socket.
80 save %sp,-STACK_FRAME-16,%sp
109 ldxa [$inp+%g0]0x88,$h0 ! load little-endian key
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H A Dpoly1305-ppcfp.pl2 # Copyright 2016-2020 The OpenSSL Project Authors. All Rights Reserved.
22 # and improvement coefficients relative to gcc-generated code.
56 ( $xlate="${dir}ppc-xlate.pl" and -f $xlate ) or
57 ( $xlate="${dir}../../perlasm/ppc-xlate.pl" and -f $xlate) or
58 die "can't locate ppc-xlate.pl";
69 my ($in0,$in1,$in2,$in3,$i1,$i2,$i3) = map("r$_",(7..12,6));
88 $STU $sp,-$LOCALS($sp) # minimal frame
110 beq- Lno_key
121 li $in2,8
122 li $in3,12
[all …]
/freebsd/crypto/openssl/crypto/aes/asm/
H A Daesp8-ppc.pl2 # Copyright 2014-2024 The OpenSSL Project Authors. All Rights Reserved.
19 # The module is endian-agnostic in sense that it supports both big-
20 # and little-endian cases. Data alignment in parallelizable modes is
25 # is aligned programmatically, which in turn guarantees exception-
33 # Add XTS subroutine, 9x on little- and 12x improvement on big-endian
37 # Current large-block performance in cycles per byte processed with
38 # 128-bit key (less is better).
40 # CBC en-/decrypt CTR XTS
72 ( $xlate="${dir}ppc-xlate.pl" and -f $xlate ) or
73 ( $xlate="${dir}../../perlasm/ppc-xlate.pl" and -f $xlate) or
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H A Daesv8-armx.pl2 # Copyright 2014-2023 The OpenSSL Project Authors. All Rights Reserved.
18 # module is endian-agnostic in sense that it supports both big- and
19 # little-endian cases. As does it support both 32- and 64-bit modes
24 # instruction latencies and issue rates. On Cortex-A53, an in-order
25 # execution core, this costs up to 10-15%, which is partially
26 # compensated by implementing dedicated code path for 128-bit
27 # CBC encrypt case. On Cortex-A57 parallelizable mode performance
32 # Key to performance of parallelize-able modes is round instruction
42 # Performance in cycles per byte processed with 128-bit key:
46 # Cortex-A53 1.32 1.17/1.29(**) 1.36/1.46
[all …]
H A Daesni-x86_64.pl2 # Copyright 2009-2020 The OpenSSL Project Authors. All Rights Reserved.
17 # This module implements support for Intel AES-NI extension. In
19 # drop-in replacement for crypto/aes/asm/aes-x86_64.pl [see below for
25 # non-parallelizable modes such as CBC encrypt is 3.75 cycles per byte
26 # processed with 128-bit key. And given their throughput asymptotic
30 # different modes and block sized. Pairs of numbers are for en-/
33 # 16-byte 64-byte 256-byte 1-KB 8-KB
42 # that otherwise used 'openssl speed -evp aes-128-??? -engine aesni
43 # [-decrypt]' will exhibit 10-15% worse results for smaller blocks.
51 # Looking at the results for 8-KB buffer.
[all …]
/freebsd/contrib/netbsd-tests/ipf/
H A Dt_nat_parse.sh28 # (C)opyright 1993-1996 by Darren Reed.
37 atf_check -o file:exp -e ignore ipnat -Rnvf reg
41 test_case in2 intest text text
42 test_case in3 intest text text
64 atf_add_test_case in2
65 atf_add_test_case in3
/freebsd/sys/contrib/device-tree/Bindings/hwmon/
H A Dadc128d818.txt2 --------------------------------------------------------
6 - Mode 0: 7 single-ended voltage readings (IN0-IN6),
8 - Mode 1: 8 single-ended voltage readings (IN0-IN7),
10 - Mode 2: 4 pseudo-differential voltage readings
11 (IN0-IN1, IN3-IN2, IN4-IN5, IN7-IN6),
13 - Mode 3: 4 single-ended voltage readings (IN0-IN3),
14 2 pseudo-differential voltage readings
15 (IN4-IN5, IN7-IN6),
24 - compatible: must be set to "ti,adc128d818"
25 - reg: I2C address of the device
[all …]
H A Dti,adc128d818.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Javier Carrasco <javier.carrasco.cruz@gmail.com>
14 The ADC128D818 is a 12-Bit, 8-Channel Analog to Digital Converter (ADC)
31 Mode 0 - 7 single-ended voltage readings (IN0-IN6), 1 temperature
33 Mode 1 - 8 single-ended voltage readings (IN0-IN7), no temperature.
34 Mode 2 - 4 pseudo-differential voltage readings
35 (IN0-IN1, IN3-IN2, IN4-IN5, IN7-IN6), 1 temperature reading (internal).
36 Mode 3 - 4 single-ended voltage readings (IN0-IN3), 2 pseudo-differential
[all …]
H A Dina3221.txt5 - compatible: Must be "ti,ina3221"
6 - reg: I2C address
9 - ti,single-shot: This chip has two power modes: single-shot (chip takes one
13 but the single-shot mode is more power-friendly and useful
14 for battery-powered device which cares power consumptions
16 If this property is present, the single-shot mode will be
22 - #address-cells: Required only if a child node is present. Must be 1.
23 - #size-cells: Required only if a child node is present. Must be 0.
27 - reg: Must be 0, 1 or 2, corresponding to IN1, IN2 or IN3 port of INA3221
30 - label: Name of the input source
[all …]
/freebsd/usr.bin/units/
H A Ddefinitions.units17 yotta- 1e24
18 zetta- 1e21
19 exa- 1e18
20 peta- 1e15
21 tera- 1e12
22 giga- 1e9
23 mega- 1e6
24 myria- 1e4
25 kilo- 1e3
26 hecto- 1e2
[all …]
/freebsd/crypto/openssl/crypto/poly1305/
H A Dpoly1305_ieee754.c2 * Copyright 2016-2018 The OpenSSL Project Authors. All Rights Reserved.
11 * This module is meant to be used as template for non-x87 floating-
12 * point assembly modules. The template itself is x86_64-specific
14 * have to recognize platform-specific parts, UxTOy and inline asm,
17 * Huh? x86_64-specific code as template for non-x87? Note seven, which
18 * is not a typo, but reference to 80-bit precision. This module on the
19 * other hand relies on 64-bit precision operations, which are default
21 * large-block performance in cycles per processed byte for *this* code
23 * gcc-4.8 icc-15.0 clang-3.4(*)
50 # error "this is gcc-specific template"
[all …]
/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Dmax98090.txt7 - compatible : "maxim,max98090" or "maxim,max98091".
9 - reg : The I2C address of the device.
11 - interrupts : The CODEC's interrupt output.
15 - clocks: The phandle of the master clock to the CODEC
17 - clock-names: Should be "mclk"
19 - #sound-dai-cells : should be 0.
21 - maxim,dmic-freq: Frequency at which to clock DMIC
23 - maxim,micbias: Micbias voltage applies to the analog mic, valid voltages value are:
24 0 - 2.2v
25 1 - 2.55v
[all …]
H A Drt5665.txt7 - compatible : One of "realtek,rt5665", "realtek,rt5666".
9 - reg : The I2C address of the device.
11 - interrupts : The CODEC's interrupt output.
15 - realtek,in1-differential
16 - realtek,in2-differential
17 - realtek,in3-differential
18 - realtek,in4-differential
19 Boolean. Indicate MIC1/2/3/4 input are differential, rather than single-ended.
21 - realtek,dmic1-data-pin
26 - realtek,dmic2-data-pin
[all …]
H A Dmaxim,max98090.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
14 MIC1, MIC2, DMICL, DMICR, IN1, IN2, IN3, IN4, IN5, IN6, IN12, IN34, IN56,
18 - $ref: dai-common.yaml#
23 - maxim,max98090
24 - maxim,max98091
31 - description: master clock
33 clock-names:
[all …]
H A Dnvidia,tegra-audio-max98090.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra-audio-max98090.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jon Hunter <jonathanh@nvidia.com>
11 - Thierry Reding <thierry.reding@gmail.com>
14 - $ref: nvidia,tegra-audio-common.yaml#
19 - items:
20 - pattern: '^[a-z0-9]+,tegra-audio-max98090(-[a-z0-9]+)+$'
21 - const: nvidia,tegra-audio-max98090
[all …]
H A Drt5640.txt7 - compatible : One of "realtek,rt5640" or "realtek,rt5639".
9 - reg : The I2C address of the device.
11 - interrupts : The CODEC's interrupt output.
15 - clocks: The phandle of the master clock to the CODEC
16 - clock-names: Should be "mclk"
18 - realtek,in1-differential
19 - realtek,in2-differential
20 - realtek,in3-differential
21 Boolean. Indicate MIC1/2/3 input are differential, rather than single-ended.
23 - realtek,lout-differential
[all …]
H A Dcirrus,madera.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - patches@opensource.cirrus.com
21 include/dt-bindings/sound/madera.h
26 - $ref: dai-common.yaml#
29 '#sound-dai-cells':
38 INnAR INnBL INnBR. For non-muxed inputs the first two cells
46 $ref: /schemas/types.yaml#/definitions/uint32-array
54 cirrus,out-mono:
[all …]
H A Dwlf,arizona.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - patches@opensource.cirrus.com
20 - $ref: dai-common.yaml#
23 '#sound-dai-cells':
31 signals. Valid values are 0 (Differential), 1 (Single-ended) and
36 default. Entries are <IN1, IN2, IN3, IN4> (wm5102, wm5110, wm8280,
38 $ref: /schemas/types.yaml#/definitions/uint32-array
46 wlf,out-mono:
[all …]
/freebsd/sys/contrib/device-tree/Bindings/iio/adc/
H A Dadi,ad4695.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <Michael.Hennerich@analog.com>
11 - Nuno Sá <nuno.sa@analog.com>
14 A family of similar multi-channel analog to digital converters with SPI bus.
21 $ref: /schemas/spi/spi-peripheral-props.yaml#
26 - adi,ad4695
27 - adi,ad4696
28 - adi,ad4697
[all …]
/freebsd/sys/dev/sound/pci/
H A Demu10kx-pcm.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
5 * Copyright (c) 2003-2007 Yuriy Tsibizov <yuriy.tsibizov@gfk.ru>
175 /* not connected */ /* in2 (zoom) */
176 [SOUND_MIXER_DIGITAL2] = {1, 1, 3}, /* in3 toslink */
177 [SOUND_MIXER_LINE2] = {1, 1, 4}, /* in4 Line-In2 */
178 [SOUND_MIXER_DIGITAL3] = {1, 1, 5}, /* in5 on-card SPDIF */
187 [SOUND_MIXER_VOLUME] = {1, 0, (-1)},
188 [SOUND_MIXER_PCM] = {1, 0, (-1)},
192 [SOUND_MIXER_DIGITAL2] = {1, 1, 2}, /* in2 COAX SPDIF */
[all …]

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