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/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Dmscc,ocelot-icpu-intr.yaml4 $id: http://devicetree.org/schemas/interrupt-controller/mscc,ocelot-icpu-intr.yaml#
7 title: Microsemi Ocelot SoC ICPU Interrupt Controller
17 ICPU. It is connected directly to the MIPS core interrupt
24 - mscc,jaguar2-icpu-intr
25 - mscc,luton-icpu-intr
26 - mscc,ocelot-icpu-intr
27 - mscc,serval-icpu-intr
56 compatible = "mscc,ocelot-icpu-intr";
H A Dmscc,ocelot-icpu-intr.txt1 Microsemi Ocelot SoC ICPU Interrupt Controller
5 - compatible : should be "mscc,ocelot-icpu-intr"
15 compatible = "mscc,ocelot-icpu-intr";
/freebsd/sys/contrib/device-tree/src/mips/mscc/
H A Dluton.dtsi60 compatible = "mscc,luton-icpu-intr";
H A Dserval.dtsi63 compatible = "mscc,serval-icpu-intr";
H A Djaguar2.dtsi64 compatible = "mscc,jaguar2-icpu-intr";
H A Docelot.dtsi60 compatible = "mscc,ocelot-icpu-intr";