| /linux/drivers/gpu/drm/panel/ |
| H A D | panel-arm-versatile.c | 10 * named "IB1" or "IB2" (Interface Board 1 & 2 respectively.) They 19 * - The IB2 is a more complex board intended for GSM phone development 58 /* IB2 control register for the Versatile daughterboard */ 93 * @ib2: the panel may be connected on an IB2 daughterboard 95 bool ib2; member 119 * @ib2_map: map to the IB2 syscon, if applicable 196 * Versatile AB IB2 daughterboard for GSM prototyping. 216 .ib2 = true, 230 /* If we're on an IB2 daughterboard, turn off display */ in versatile_panel_disable() 232 dev_dbg(vpanel->dev, "disable IB2 display\n"); in versatile_panel_disable() [all …]
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| /linux/arch/arm/boot/dts/arm/ |
| H A D | versatile-ab-ib2.dts | 3 * The Versatile AB with the IB2 expansion board mounted. 10 model = "ARM Versatile AB + IB2 board"; 12 /* Special IB2 control register */ 14 compatible = "arm,versatile-ib2-syscon", "syscon", "simple-mfd"; 25 label = "versatile-ib2:0";
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| H A D | Makefile | 24 versatile-ab-ib2.dtb \
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| /linux/drivers/net/ethernet/mediatek/ |
| H A D | mtk_ppe.c | 204 return &entry->bridge.ib2; in mtk_foe_entry_ib2() 207 return &entry->ipv6.ib2; in mtk_foe_entry_ib2() 209 return &entry->ipv4.ib2; in mtk_foe_entry_ib2() 256 entry->bridge.ib2 = val; in mtk_foe_entry_prepare() 259 entry->ipv6.ib2 = val; in mtk_foe_entry_prepare() 262 entry->ipv4.ib2 = val; in mtk_foe_entry_prepare() 282 u32 *ib2 = mtk_foe_entry_ib2(eth, entry); in mtk_foe_entry_set_pse_port() local 283 u32 val = *ib2; in mtk_foe_entry_set_pse_port() 292 *ib2 = val; in mtk_foe_entry_set_pse_port() 432 u32 *ib2 = mtk_foe_entry_ib2(eth, entry); in mtk_foe_entry_set_wdma() local [all …]
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| H A D | mtk_ppe_debugfs.c | 90 u32 ib2; in mtk_ppe_debugfs_foe_show() local 148 ib2 = entry->ipv6.ib2; in mtk_ppe_debugfs_foe_show() 151 ib2 = entry->ipv4.ib2; in mtk_ppe_debugfs_foe_show() 160 " vlan=%d,%d ib1=%08x ib2=%08x" in mtk_ppe_debugfs_foe_show() 163 l2->vlan1, l2->vlan2, entry->ib1, ib2, in mtk_ppe_debugfs_foe_show()
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| /linux/drivers/net/ethernet/airoha/ |
| H A D | airoha_ppe.c | 432 hwe->bridge.ib2 = val; in airoha_ppe_foe_entry_prepare() 436 hwe->ipv6.ib2 = val; in airoha_ppe_foe_entry_prepare() 441 hwe->ipv4.ib2 = val; in airoha_ppe_foe_entry_prepare() 639 u32 index, pse_port, val, *data, *ib2, *meter; in airoha_ppe_foe_flow_stats_update() local 655 ib2 = &hwe->bridge.ib2; in airoha_ppe_foe_flow_stats_update() 659 ib2 = &hwe->ipv6.ib2; in airoha_ppe_foe_flow_stats_update() 663 ib2 = &hwe->ipv4.ib2; in airoha_ppe_foe_flow_stats_update() 667 pse_port = FIELD_GET(AIROHA_FOE_IB2_PSE_PORT, *ib2); in airoha_ppe_foe_flow_stats_update() 677 val = *ib2 & (AIROHA_FOE_IB2_NBQ | AIROHA_FOE_IB2_PSE_PORT | in airoha_ppe_foe_flow_stats_update() 682 *ib2 &= ~(AIROHA_FOE_IB2_NBQ | AIROHA_FOE_IB2_PSE_PORT | in airoha_ppe_foe_flow_stats_update() [all …]
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| H A D | airoha_eth.h | 370 u32 ib2; 398 u32 ib2; 412 u32 ib2; 442 u32 ib2; 368 u32 ib2; global() member 396 u32 ib2; global() member 410 u32 ib2; global() member 440 u32 ib2; global() member
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| /linux/Documentation/devicetree/bindings/arm/ |
| H A D | arm,versatile.yaml | 21 When fitted with the IB2 Interface Board, the Versatile AB will present an 32 to an IB1 interface board for a touchscreen-type use case or an IB2
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| /linux/Documentation/devicetree/bindings/mfd/ |
| H A D | arm,dev-platforms-syscon.yaml | 38 - arm,versatile-ib2-syscon
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| /linux/drivers/gpu/drm/amd/include/ivsrcid/gfx/ |
| H A D | irqsrcs_gfx_10_1.h | 30 #define GFX_10_1__SRCID__CP_IB2_INTERRUPT_PKT 178 // B2 CP_INTERRUPT pkt in IB2
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| H A D | irqsrcs_gfx_9_0.h | 32 #define GFX_9_0__SRCID__CP_IB2_INTERRUPT_PKT 178 /* B2 CP_INTERRUPT pkt in IB2 */
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| /linux/drivers/gpu/drm/msm/adreno/ |
| H A D | a8xx_gpu.c | 1151 "BR: status %8.8X rb %4.4x/%4.4x ib1 %16.16llX/%4.4x ib2 %16.16llX/%4.4x ib3 %16.16llX/%4.4x\n", in a8xx_fault_detect_irq() 1166 "BV: status %8.8X rb %4.4x/%4.4x ib1 %16.16llX/%4.4x ib2 %16.16llX/%4.4x ib3 %16.16llX/%4.4x\n", in a8xx_fault_detect_irq()
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| H A D | a3xx_gpu.c | 338 /* CP ROQ queue sizes (bytes) - RB:16, ST:16, IB1:32, IB2:64 */ in a3xx_hw_init()
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| H A D | a5xx_gpu.c | 166 /* Allow CP_CONTEXT_SWITCH_YIELD packets in the IB2 */ in a5xx_submit() 1241 …"gpu fault ring %d fence %x status %8.8X rb %4.4x/%4.4x ib1 %16.16llX/%4.4x ib2 %16.16llX/%4.4x\n", in a5xx_fault_detect_irq()
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| H A D | a6xx_gpu.c | 1835 …"gpu fault ring %d fence %x status %8.8X rb %4.4x/%4.4x ib1 %16.16llX/%4.4x ib2 %16.16llX/%4.4x\n", in a6xx_fault_detect_irq()
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| /linux/drivers/gpu/drm/radeon/ |
| H A D | r600.c | 4084 * 178 - CP_INT IB2 4289 case 178: /* CP_INT in IB2 */ in r600_irq_process()
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| /linux/drivers/gpu/drm/msm/registers/adreno/ |
| H A D | a6xx.xml | 31 is either overwritten by renderpass/blit (ib2) or not used if not overwritten 244 b24..31 identifies where IB2 data starts (and IB1 data ends) 254 processing starts (and IB2 data ends). I'm guessing
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