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/freebsd/sys/contrib/device-tree/Bindings/i3c/
H A Di3c.yaml4 $id: http://devicetree.org/schemas/i3c/i3c.yaml#
7 title: I3C bus
14 I3C busses can be described with a node for the primary I3C controller device
15 and a set of child nodes for each I2C or I3C slave on the bus. Each of them
20 pattern: "^i3c@[0-9a-f]+$"
27 All I3C devices are supposed to support DAA (Dynamic Address Assignment),
28 and are thus discoverable. So, by default, I3C devices do not have to be
32 I3C devices.
34 Another use case for describing an I3C device in the device tree is when
35 this I3C device has a static I2C address and we want to assign it a
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H A Di3c.txt1 Generic device tree bindings for I3C busses
4 This document describes generic bindings that should be used to describe I3C
12 - compatible - name of the I3C master controller driving the I3C bus
16 The node describing an I3C bus should be named i3c-master.
21 These properties may not be supported by all I3C master drivers. Each I3C
24 - i3c-scl-hz: frequency of the SCL signal used for I3C transfers.
48 + third cell: shall encode the I3C LVR (Legacy Virtual Register)
68 I3C devices
71 All I3C devices are supposed to support DAA (Dynamic Address Assignment), and
72 are thus discoverable. So, by default, I3C devices do not have to be described
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H A Dcdns,i3c-master.txt1 Bindings for cadence I3C master block
6 - compatible: shall be "cdns,i3c-master"
9 - interrupts: the interrupt line connected to this I3C master
10 - reg: I3C master registers
13 Documentation/devicetree/bindings/i3c/i3c.yaml for more details):
19 Documentation/devicetree/bindings/i3c/i3c.yaml for more details):
22 - i3c-scl-hz
24 I3C device connected on the bus follow the generic description (see
25 Documentation/devicetree/bindings/i3c/i3c.yaml for more details).
29 i3c-master@0d040000 {
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H A Dsnps,dw-i3c-master.txt1 Bindings for Synopsys DesignWare I3C master block
6 - compatible: shall be "snps,dw-i3c-master-1.00a"
8 - interrupts: the interrupt line connected to this I3C master
9 - reg: Offset and length of I3C master registers
12 Documentation/devicetree/bindings/i3c/i3c.yaml for more details):
18 Documentation/devicetree/bindings/i3c/i3c.yaml for more details):
21 - i3c-scl-hz
23 I3C device connected on the bus follow the generic description (see
24 Documentation/devicetree/bindings/i3c/i3c.yaml for more details).
28 i3c-master@2000 {
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H A Dmipi-i3c-hci.yaml4 $id: http://devicetree.org/schemas/i3c/mipi-i3c-hci.yaml#
7 title: MIPI I3C HCI
13 - $ref: /schemas/i3c/i3c.yaml#
16 MIPI I3C Host Controller Interface
18 The MIPI I3C HCI (Host Controller Interface) specification defines
19 a common software driver interface to support compliant MIPI I3C
27 https://www.mipi.org/specifications/i3c-hci
31 const: mipi-i3c-hci
46 i3c@a0000000 {
47 compatible = "mipi-i3c-hci";
H A Daspeed,ast2600-i3c.yaml4 $id: http://devicetree.org/schemas/i3c/aspeed,ast2600-i3c.yaml#
7 title: ASPEED AST2600 i3c controller
13 - $ref: i3c.yaml#
17 const: aspeed,ast2600-i3c
41 - description: phandle to i3c global register syscon node
42 - description: index of this i3c controller in the global register set
44 A (phandle, controller index) reference to the i3c global register set
60 i3c@2000 {
61 compatible = "aspeed,ast2600-i3c";
H A Dsnps,dw-i3c-master.yaml4 $id: http://devicetree.org/schemas/i3c/snps,dw-i3c-master.yaml#
7 title: Synopsys DesignWare I3C master block
13 - $ref: i3c.yaml#
17 const: snps,dw-i3c-master-1.00a
47 i3c@2000 {
48 compatible = "snps,dw-i3c-master-1.00a";
H A Dcdns,i3c-master.yaml4 $id: http://devicetree.org/schemas/i3c/cdns,i3c-master.yaml#
7 title: Cadence I3C master block
13 - $ref: i3c.yaml#
17 const: cdns,i3c-master
44 i3c@d040000 {
45 compatible = "cdns,i3c-master";
H A Dsilvaco,i3c-master.yaml4 $id: http://devicetree.org/schemas/i3c/silvaco,i3c-master.yaml#
7 title: Silvaco I3C master
13 - $ref: i3c.yaml#
17 const: silvaco,i3c-master-v1
51 i3c@a0000000 {
52 compatible = "silvaco,i3c-master-v1";
/freebsd/sys/contrib/device-tree/src/arm64/intel/
H A Dsocfpga_agilex5.dtsi205 i3c0: i3c@10da0000 {
206 compatible = "snps,dw-i3c-master-1.00a";
215 i3c1: i3c@10da1000 {
216 compatible = "snps,dw-i3c-master-1.00a";
/freebsd/sys/contrib/device-tree/src/arm/aspeed/
H A Daspeed-bmc-facebook-harma.dts644 "","i3c-cpu-mux0-oe-n",
645 "","i3c-cpu-mux0-select",
647 "","i3c-cpu-mux1-oe-n",
648 "","i3c-cpu-mux1-select",
/freebsd/sys/contrib/device-tree/Bindings/iio/imu/
H A Dinvensense,icm42600.yaml16 It has a configurable host interface that supports I3C, I2C and SPI serial
/freebsd/sys/contrib/device-tree/Bindings/soc/qcom/
H A Dqcom,geni-se.yaml15 like UART, SPI, I2C, I3C, etc. A single QUP module can provide upto 8 Serial
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx93.dtsi354 i3c1: i3c@44330000 {
355 compatible = "silvaco,i3c-master-v1";
740 i3c2: i3c@42520000 {
741 compatible = "silvaco,i3c-master-v1";
/freebsd/usr.sbin/pciconf/
H A Dpciconf.c735 {PCIC_SERIALBUS, PCIS_SERIALBUS_MIPI_I3C, "MIPI I3C"},
/freebsd/share/misc/
H A Dusb_vendors24040 C 3c I3C