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/linux/Documentation/devicetree/bindings/mailbox/
H A Dnvidia,tegra186-hsp.yaml4 $id: http://devicetree.org/schemas/mailbox/nvidia,tegra186-hsp.yaml#
7 title: NVIDIA Tegra Hardware Synchronization Primitives (HSP)
14 The HSP modules are used for the processors to share resources and
21 The features that HSP supported are shared mailboxes, shared
25 contain two cells. The first cell determines the HSP type and the
53 mailboxes may vary by instance of the HSP block and SoC
59 <dt-bindings/mailbox/tegra186-hsp.h>
65 - nvidia,tegra186-hsp
66 - nvidia,tegra194-hsp
67 - nvidia,tegra264-hsp
[all …]
/linux/Documentation/devicetree/bindings/usb/
H A Deswin,eic7700-usb.yaml51 eswin,hsp-sp-csr:
53 HSP CSR is to control and get status of different high-speed peripherals
59 - description: phandle to HSP Register Controller hsp_sp_csr node.
72 - eswin,hsp-sp-csr
93 eswin,hsp-sp-csr = <&hsp_sp_csr 0x800 0x818>;
/linux/Documentation/devicetree/bindings/firmware/
H A Dnvidia,tegra186-bpmp.yaml26 - .../mailbox/nvidia,tegra186-hsp.yaml
143 #include <dt-bindings/mailbox/tegra186-hsp.h>
146 hsp_top0: hsp@3c00000 {
147 compatible = "nvidia,tegra186-hsp";
202 #include <dt-bindings/mailbox/tegra186-hsp.h>
/linux/drivers/video/fbdev/kyro/
H A DSTG4000VTG.c159 if ((pTiming->HSP > 0) && (pTiming->VSP < 0)) { /* +hsync -vsync */ in SetupVTG()
161 } else if ((pTiming->HSP < 0) && (pTiming->VSP > 0)) { /* -hsync +vsync */ in SetupVTG()
163 } else if ((pTiming->HSP < 0) && (pTiming->VSP < 0)) { /* -hsync -vsync */ in SetupVTG()
165 } else if ((pTiming->HSP > 0) && (pTiming->VSP > 0)) { /* +hsync -vsync */ in SetupVTG()
H A Dfbdev.c315 par->HSP, par->VSP, &par->PIXCLK) < 0) in kyro_dev_video_mode_set()
470 if (par->HSP == 1) in kyrofb_check_var()
525 par->HSP = (info->var.sync & FB_SYNC_HOR_HIGH_ACT) ? 1 : 0; in kyrofb_set_par()
/linux/drivers/clk/imx/
H A Dclk-imx35.c64 /* 0 */ ckih, mpll, ppll, mpll_075, arm, hsp, hsp_div, hsp_sel, ahb, enumerator
125 pr_err("i.MX35 clk: illegal hsp clk selection 0x%x\n", hsp_sel); in _mx35_clocks_init()
129 clk[hsp] = imx_clk_fixed_factor("hsp", "arm", 1, hsp_div[hsp_sel]); in _mx35_clocks_init()
190 clk[ipu_gate] = imx_clk_gate2("ipu_gate", "hsp", base + MX35_CCM_CGR1, 18); in _mx35_clocks_init()
/linux/drivers/video/fbdev/
H A Dcarminefb.c63 u32 hsp; member
106 .hsp = 672,
118 .hsp = 864,
372 u32 hdp, vdp, htp, hsp, hsw, vtr, vsp, vsw; in set_display_parameters() local
381 hsp = par->res->hsp - 1; in set_display_parameters()
394 (hsp)); in set_display_parameters()
H A Dpxa3xx-regs.h133 #define LCCR3_HorSnchH (LCCR3_HSP*0) /* HSP Active High */
134 #define LCCR3_HorSnchL (LCCR3_HSP*1) /* HSP Active Low */
/linux/drivers/usb/dwc3/
H A Ddwc3-generic-plat.c53 "eswin,hsp-sp-csr", in dwc3_eic7700_init()
56 dev_err(dev, "No hsp-sp-csr phandle specified\n"); in dwc3_eic7700_init()
/linux/drivers/firmware/tegra/
H A DKconfig22 It needs HSP as the HW synchronization and notification module and
H A Dbpmp-tegra186.c348 dev_err(bpmp->dev, "failed to get HSP mailbox: %d\n", err); in tegra186_bpmp_init()
/linux/drivers/scsi/lpfc/
H A Dlpfc_nportdisc.c85 volatile struct serv_parm *hsp = &vport->fc_sparam; in lpfc_check_sparm() local
97 hsp_value = ((hsp->cls1.rcvDataSizeMsb << 8) | in lpfc_check_sparm()
98 hsp->cls1.rcvDataSizeLsb); in lpfc_check_sparm()
105 hsp->cls1.rcvDataSizeLsb; in lpfc_check_sparm()
107 hsp->cls1.rcvDataSizeMsb; in lpfc_check_sparm()
114 hsp_value = ((hsp->cls2.rcvDataSizeMsb << 8) | in lpfc_check_sparm()
115 hsp->cls2.rcvDataSizeLsb); in lpfc_check_sparm()
122 hsp->cls2.rcvDataSizeLsb; in lpfc_check_sparm()
124 hsp->cls2.rcvDataSizeMsb; in lpfc_check_sparm()
131 hsp_value = ((hsp->cls3.rcvDataSizeMsb << 8) | in lpfc_check_sparm()
[all …]
H A Dlpfc_ct.c2953 struct serv_parm *hsp = (struct serv_parm *)&vport->fc_sparam; in lpfc_fdmi_port_attr_max_frame() local
2956 (((uint32_t)hsp->cmn.bbRcvSizeMsb & 0x0F) << 8) | in lpfc_fdmi_port_attr_max_frame()
2957 (uint32_t)hsp->cmn.bbRcvSizeLsb); in lpfc_fdmi_port_attr_max_frame()
/linux/include/dt-bindings/mailbox/
H A Dtegra186-hsp.h3 * This header provides constants for binding nvidia,tegra186-hsp.
/linux/Documentation/devicetree/bindings/serial/
H A Dnvidia,tegra194-tcu.yaml54 #include <dt-bindings/mailbox/tegra186-hsp.h>
/linux/drivers/video/fbdev/mb862xx/
H A Dmb862xxfbdrv.c48 static inline int hsp(struct fb_var_screeninfo *var) in hsp() function
251 pack((fbi->var.hsync_len - 1), hsp(&fbi->var)); in mb862xxfb_set_par()
438 unsigned long hsp, vsp, ht, vt; in mb862xxfb_init_fbinfo() local
461 hsp = (reg & 0xffff) + 1; in mb862xxfb_init_fbinfo()
463 fbi->var.right_margin = hsp - fbi->var.xres; in mb862xxfb_init_fbinfo()
464 fbi->var.left_margin = ht - hsp - fbi->var.hsync_len; in mb862xxfb_init_fbinfo()
/linux/Documentation/devicetree/bindings/clock/
H A Dimx35-clock.yaml24 hsp 5
H A Dimx31-clock.yaml26 hsp 7
/linux/include/video/
H A Dkyro.h23 s32 HSP; /* Hor Sync Polarity */ member
/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra186-p3310.dtsi163 hsp@3c00000 {
H A Dtegra186-p3509-0000+p3636-0001.dts722 hsp@3c00000 {
/linux/drivers/atm/
H A Dhe.c1460 he_dev->hsp = dma_alloc_coherent(&he_dev->pci_dev->dev, in he_start()
1463 if (he_dev->hsp == NULL) { in he_start()
1562 if (he_dev->hsp) in he_stop()
1564 he_dev->hsp, he_dev->hsp_phys); in he_stop()
1641 he_dev->hsp->group[group].rbrq_tail); in he_service_rbrq()
1801 he_dev->hsp->group[group].tbrq_tail); in he_service_tbrq()
H A Dhe.h310 struct he_hsp *hsp; member
/linux/drivers/mmc/host/
H A Dsdhci-of-dwcmshc.c1621 ret = of_parse_phandle_with_fixed_args(dev->of_node, "eswin,hsp-sp-csr", 2, 0, &args); in eic7700_init()
1623 dev_err(dev, "Fail to parse 'eswin,hsp-sp-csr' phandle (%d)\n", ret); in eic7700_init()
1629 dev_err(dev, "Failed to get regmap for 'eswin,hsp-sp-csr'\n"); in eic7700_init()
/linux/drivers/soc/tegra/cbb/
H A Dtegra194-cbb.c537 [0x0e] = "multiport0_t/T/hsp",
851 [0x0a] = "multiport1_t/T/hsp",
1220 [0x0b] = "multiport0_t/T/hsp",

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