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/linux/Documentation/devicetree/bindings/phy/
H A Dfsl,imx8qm-hsio.yaml4 $id: http://devicetree.org/schemas/phy/fsl,imx8qm-hsio.yaml#
7 title: Freescale i.MX8QM SoC series High Speed IO(HSIO) SERDES PHY
15 - fsl,imx8qm-hsio
16 - fsl,imx8qxp-hsio
20 - description: HSIO control and status registers(CSR) of the PHY
21 - description: HSIO CSR of the controller bound to the PHY
22 - description: HSIO CSR for MISC
47 fsl,hsio-cfg:
49 Specifies the use case of the HSIO module in the hardware design.
50 Regarding the design of i.MX8QM HSIO subsystem, HSIO module can be
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H A Dintel,combo-phy.yaml56 intel,hsio:
60 - description: phandle to HSIO registers
62 description: HSIO registers handle and ComboPhy instance id on NOC
84 - intel,hsio
106 intel,hsio = <&hsiol 0>;
H A Dphy-tegra194-p2u.yaml13 Tegra194 has two PHY bricks namely HSIO (High Speed IO) and NVHS (NVIDIA High
15 Tegra234 has three PHY bricks namely HSIO, NVHS and GBE (Gigabit Ethernet)
18 interface and PHY of HSIO/NVHS/GBE bricks. Each P2U instance represents one
H A Dmscc,vsc7514-serdes.yaml14 On Microsemi Ocelot, there is a handful of registers in HSIO address
29 This is a child of the HSIO syscon ("mscc,ocelot-hsio", see
H A Dmicrochip,lan966x-serdes.yaml34 - description: HSIO registers
/linux/Documentation/devicetree/bindings/soc/imx/
H A Dfsl,imx8mp-hsio-blk-ctrl.yaml4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml#
7 title: NXP i.MX8MP HSIO blk-ctrl
13 The i.MX8MP HSIO blk-ctrl is a top-level peripheral providing access to
15 (USB an PCIe) peripherals located in the HSIO domain of the SoC.
20 - const: fsl,imx8mp-hsio-blk-ctrl
80 compatible = "fsl,imx8mp-hsio-blk-ctrl", "syscon";
/linux/Documentation/devicetree/bindings/mips/
H A Dmscc.txt28 o HSIO regs:
30 The SoC has a few registers (HSIO) handling miscellaneous functionalities:
35 - compatible: Should be "mscc,ocelot-hsio", "syscon", "simple-mfd"
40 compatible = "mscc,ocelot-hsio", "syscon", "simple-mfd";
/linux/drivers/phy/microchip/
H A Dlan966x_serdes_regs.h17 /* HSIO:SD:SD_CFG */
110 /* HSIO:SD:MPLL_CFG */
137 /* HSIO:SD:SD_STAT */
164 /* HSIO:HW_CFGSTAT:HW_CFG */
209 /* HSIO:HW_CFGSTAT:RGMII_CFG */
230 /* HSIO:HW_CFGSTAT:DLL_CFG */
H A Dlan966x_serdes.c188 /* Note: SerDes HSIO is configured in 1G_LAN mode */ in lan966x_sd6g40_reg_cfg()
/linux/Documentation/devicetree/bindings/usb/
H A Dfsl,imx8mp-dwc3.yaml23 - description: Address and length of the register set for HSIO Block Control
48 - description: system hsio root clock.
53 - const: hsio
120 clock-names = "hsio", "suspend";
H A Dfsl,usbmisc.yaml54 - description: Base and length of the HSIO Block Control register
66 # imx95 soc needs use HSIO Block Control
/linux/drivers/phy/freescale/
H A Dphy-fsl-imx8qm-hsio.c29 /* i.MX8Q HSIO registers */
511 {.compatible = "fsl,imx8qm-hsio", .data = &imx8qm_hsio_drvdata},
512 {.compatible = "fsl,imx8qxp-hsio", .data = &imx8qxp_hsio_drvdata},
549 /* Get HSIO configuration mode */ in imx_hsio_probe()
550 if (of_property_read_string(np, "fsl,hsio-cfg", &priv->hsio_cfg)) in imx_hsio_probe()
604 .name = "imx8qm-hsio-phy",
610 MODULE_DESCRIPTION("FSL IMX8QM HSIO SERDES PHY driver");
H A DMakefile6 obj-$(CONFIG_PHY_FSL_IMX8QM_HSIO) += phy-fsl-imx8qm-hsio.o
/linux/tools/perf/pmu-events/arch/arm64/freescale/imx8mp/sys/
H A Dmetrics.json275 "BriefDescription": "bytes of hsio usb1 read from ddr",
283 "BriefDescription": "bytes of hsio usb1 write to ddr",
291 "BriefDescription": "bytes of hsio usb2 read from ddr",
299 "BriefDescription": "bytes of hsio usb2 write to ddr",
307 "BriefDescription": "bytes of hsio pci read from ddr",
315 "BriefDescription": "bytes of hsio pci write to ddr",
/linux/drivers/mfd/
H A Docelot-core.c136 DEFINE_RES_REG_NAMED(VSC7512_HSIO_RES_START, VSC7512_HSIO_RES_SIZE, "hsio"),
141 DEFINE_RES_REG_NAMED(VSC7512_HSIO_RES_START, VSC7512_HSIO_RES_SIZE, "hsio"),
/linux/arch/mips/boot/dts/mscc/
H A Docelot.dtsi269 hsio: syscon@10d0000 { label
270 compatible = "mscc,ocelot-hsio", "syscon", "simple-mfd";
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8qxp-ss-hsio.dtsi24 compatible = "fsl,imx8qxp-hsio";
H A Dmba8xx.dtsi219 fsl,hsio-cfg = "pciea-x2-pcieb";
/linux/drivers/usb/dwc3/
H A Ddwc3-imx8mp.c195 dwc3_imx->hsio_clk = devm_clk_get_enabled(dev, "hsio"); in dwc3_imx8mp_probe()
198 "Failed to get hsio clk\n"); in dwc3_imx8mp_probe()
/linux/Documentation/devicetree/bindings/clock/
H A Dimx8qxp-lpcg.yaml40 - fsl,imx8qxp-lpcg-hsio
/linux/drivers/pmdomain/imx/
H A Dscu-pd.c201 /* HSIO SS */
207 { "hsio-gpio", IMX_SC_R_HSIO_GPIO, 1, false, 0 },
H A Dimx8mp-blk-ctrl.c847 .compatible = "fsl,imx8mp-hsio-blk-ctrl",
/linux/drivers/clk/imx/
H A Dclk-imx95-blk-ctl.c521 { .compatible = "nxp,imx95-hsio-blk-ctl", .data = &hsio_blk_ctl_dev_data },
/linux/drivers/phy/qualcomm/
H A Dphy-qcom-ipq806x-usb.c523 /* Parse device node to probe HSIO settings */ in qcom_ipq806x_usb_phy_probe()
/linux/drivers/clk/pxa/
H A Dclk-pxa3xx.c116 /* crystal frequency to HSIO bus frequency multiplier (HSS) */

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