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/freebsd/sys/contrib/device-tree/Bindings/display/
H A Darm,hdlcd.yaml4 $id: http://devicetree.org/schemas/display/arm,hdlcd.yaml#
7 title: Arm HDLCD display controller
14 The Arm HDLCD is a display controller found on several development platforms
15 produced by ARM Ltd and in more modern of its Fast Models. The HDLCD is an
21 const: arm,hdlcd
62 hdlcd@2b000000 {
63 compatible = "arm,hdlcd";
H A Darm,hdlcd.txt1 ARM HDLCD
4 by ARM Ltd and in more modern of its' Fast Models. The HDLCD is an RGB
9 - compatible: "arm,hdlcd"
16 - clock-names: A list of clock names. For HDLCD it should contain:
20 - port: The HDLCD connection to an encoder chip. The connection is modeled
36 hdlcd@2b000000 {
37 compatible = "arm,hdlcd";
/freebsd/sys/contrib/device-tree/src/arm/arm/
H A Dvexpress-v2p-ca5s.dts72 hdlcd@2a110000 {
73 compatible = "arm,hdlcd";
176 /* HDLCD */
H A Dvexpress-v2p-ca15-tc1.dts70 hdlcd@2b000000 {
71 compatible = "arm,hdlcd";
164 /* HDLCD PLL reference clock */
H A Dvexpress-v2p-ca15_a7.dts134 hdlcd@2b000000 {
135 compatible = "arm,hdlcd";
302 /* HDLCD PLL reference clock */
/freebsd/sys/contrib/device-tree/Bindings/arm/
H A Darm,scpi.txt181 hdlcd@7ff60000 {
208 Similarly the second example is hdlcd@7ff60000 and it has pxlclk1 as input
218 SCPI provides 2 power domains. The hdlcd node uses the power domain with
H A Darm,scmi.txt223 hdlcd@7ff60000 {
/freebsd/sys/contrib/device-tree/src/arm64/arm/
H A Djuno-scmi.dtsi34 hdlcd@7ff50000 {
38 hdlcd@7ff60000 {
H A Djuno-base.dtsi868 hdlcd@7ff50000 {
869 compatible = "arm,hdlcd";
883 hdlcd@7ff60000 {
884 compatible = "arm,hdlcd";