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/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Darm,gic-v5-iwb.yaml14 The GICv5 architecture defines the guidelines to implement GICv5
17 The GICv5 specification can be found at
20 GICv5 has zero or more Interrupt Wire Bridges (IWB) that are responsible
21 for translating wire signals into interrupt messages to the GICv5 ITS.
H A Darm,gic-v5.yaml14 The GICv5 architecture defines the guidelines to implement GICv5
17 The GICv5 specification can be found at
20 The GICv5 architecture is composed of multiple components:
81 GICv5 has one or more Interrupt Routing Services (IRS) that are
135 GICv5 has zero or more Interrupt Translation Services (ITS) that are
176 GICv5 ITS has one or more translate register frames.
/linux/drivers/irqchip/
H A Dirq-gic-v5-iwb.c5 #define pr_fmt(fmt) "GICv5 IWB: " fmt
159 .name = "GICv5-IWB",
270 .name = "GICv5 IWB",
H A Dirq-gic-v5-irs.c6 #define pr_fmt(fmt) "GICv5 IRS: " fmt
73 /* Taken from GICv5 specifications 10.2.1.13 IRS_IST_BASER */ in gicv5_irs_init_ist_linear()
137 /* Taken from GICv5 specifications 10.2.1.13 IRS_IST_BASER */ in gicv5_irs_init_ist_two_level()
349 * Follow GICv5 specification recommendation to opt in for two in gicv5_irs_init_ist()
703 pr_err("%pOF: unable to map GICv5 IRS registers\n", node); in gicv5_irs_init()
H A Dirq-gic-v5-its.c6 #define pr_fmt(fmt) "GICv5 ITS: " fmt
579 * We expect a GICv5 implementation requiring a large number of in gicv5_its_alloc_devtab_linear()
725 .name = "GICv5-ITS-MSI",
1206 pr_err("%pOF: unable to map GICv5 ITS_CONFIG_FRAME\n", node); in gicv5_its_init()
/linux/include/linux/irqchip/
H A Darm-vgic-info.h18 /* Full GICv5, optionally with v3 compat */
/linux/include/kvm/
H A Darm_vgic.h41 VGIC_V5, /* Newer, fancier GICv5 */
87 /* GICv3 compat mode on a GICv5 host */
/linux/arch/arm64/kvm/hyp/
H A Dvgic-v3-sr.c454 * ICH_VTR_EL2. ICC_IDR0_EL1 is only implemented on a GICv5 in __vgic_v3_get_gic_config()
455 * system, so we first check if we have GICv5 support. in __vgic_v3_get_gic_config()
/linux/arch/arm64/include/asm/
H A Del2_setup.h201 /* GICv5 system register access */
H A Dsysreg.h1071 * Definitions for GICv5 instructions
/linux/Documentation/virt/kvm/devices/
H A Darm-vgic-v3.rst16 Creating a guest GICv3 device requires a host GICv3 host, or a GICv5 host with
/linux/arch/arm64/kernel/
H A Dcpufeature.c3132 .desc = "GICv5 CPU interface",
3139 .desc = "GICv5 Legacy vCPU interface",
/linux/arch/arm64/kvm/
H A Darm.c2348 kvm_err("NV support requires GICv3 or GICv5 with legacy support, giving up\n"); in init_subsystems()
H A Dsys_regs.c2178 * If we are running on a GICv5 host and support FEAT_GCIE_LEGACY, then in set_id_aa64pfr0_el1()