| /linux/tools/testing/selftests/kvm/arm64/ |
| H A D | no-vgic-v3.c | |
| H A D | no-vgic.c | 3 // Check that, on a GICv3-capable system (GICv3 native, or GICv5 with
4 // FEAT_GCIE_LEGACY), not configuring GICv3 correctly results in all
93 "GICv3 wrongly advertised"); in guest_code_gicv3()
96 * Access all GICv3 registers, and fail if we don't get an UNDEF. in guest_code_gicv3()
281 "Neither GICv3 nor GICv5 supported."); in main()
287 pr_info("No GICv3 support: skipping no-vgic-v3 test\n"); in main()
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| H A D | vgic_init.c | 165 * ARM_VGIC (GICv2 or GICv3) device gets created with an overlapping in subtest_dist_rdist()
167 * used hence the overlap. In the case of GICv3, A RDIST region is set at @0x0 in subtest_dist_rdist()
239 "attempt to mix GICv3 REDIST and REDIST_REGION"); in subtest_v3_redist_regions()
1117 print_skip("No GICv2 nor GICv3 support");
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| /linux/arch/arm64/boot/dts/arm/ |
| H A D | foundation-v8-gicv3-psci.dts | 4 * ARMv8 Foundation model DTS (GICv3+PSCI configuration)
8 #include "foundation-v8-gicv3.dtsi"
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| H A D | foundation-v8-gicv3.dts | 5 * ARMv8 Foundation model DTS (GICv3 configuration)
9 #include "foundation-v8-gicv3.dtsi"
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| H A D | foundation-v8-gicv3.dtsi | 4 * ARMv8 Foundation model DTS (GICv3 configuration)
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| /linux/Documentation/virt/kvm/devices/ |
| H A D | arm-vgic-v3.rst | 14 possible to create both a GICv3 and GICv2 on the same VM.
16 Creating a guest GICv3 device requires a host GICv3 host, or a GICv5 host with
25 Base address in the guest physical address space of the GICv3 distributor
30 Base address in the guest physical address space of the GICv3
106 in the GICv3/4 specs. Getting or setting such a register has the same
169 rules are documented in the GICv3 specification descriptions of the ICPENDR
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| H A D | arm-vgic.rst | 16 GICv3 implementations with hardware compatibility support allow creating a
17 guest GICv2 through this interface. For information on creating a guest GICv3
19 create both a GICv3 and GICv2 device on the same VM.
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| /linux/Documentation/translations/zh_CN/arch/arm64/ |
| H A D | booting.txt | 191 对于拥有 GICv3 中断控制器并以 v3 模式运行的系统：
198 - 设备树（DT）或 ACPI 表必须描述一个 GICv3 中断控制器。
200 对于拥有 GICv3 中断控制器并以兼容（v2）模式运行的系统：
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| H A D | silicon-errata.txt | 74 | Cavium | ThunderX GICv3 | #23154 | CAVIUM_ERRATUM_23154 |
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| /linux/Documentation/translations/zh_TW/arch/arm64/ |
| H A D | booting.txt | 195 對於擁有 GICv3 中斷控制器並以 v3 模式運行的系統：
202 - 設備樹（DT）或 ACPI 表必須描述一個 GICv3 中斷控制器。
204 對於擁有 GICv3 中斷控制器並以兼容（v2）模式運行的系統：
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| H A D | silicon-errata.txt | 78 | Cavium | ThunderX GICv3 | #23154 | CAVIUM_ERRATUM_23154 |
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| /linux/arch/arm64/kvm/vgic/ |
| H A D | vgic-v3.c | 423 * When emulating GICv3 on GICv3 with SRE=1 on the in vgic_v3_set_vmcr()
453 * When emulating GICv3 on GICv3 with SRE=1 on the in vgic_v3_get_vmcr()
486 * If we are emulating a GICv3, we do it in an non-GICv2-compatible in vgic_v3_reset()
513 /* Hide GICv3 sysreg if necessary */ in vcpu_set_ich_hcr()
935 kvm_info("GICv3 sysreg trapping enabled ([%s%s%s%s], reduced performance)\n", in vgic_v3_enable_cpuif_traps()
979 kvm_info("GICv3: no GICV resource entry\n"); in vgic_v3_probe()
997 kvm_err("Cannot register GICv3 KVM device.\n"); in vgic_v3_probe()
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| H A D | vgic.c | 409 * A GICv3 (or GICv3-like) system exposing a GICv3 to the guest
1075 * memory-mapped, and VHE systems can access GICv3 EL2 system in vgic_save_state()
1133 * required for GICv3-on-GICv3, GICv2-on-GICv3, GICv3-on-GICv5, and the in vgic_flush_state()
1134 * no-in-kernel-irqchip case on GICv3 hardware. Hence, adding a switch in vgic_flush_state()
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| H A D | vgic-init.c | 262 * require prior initialization in case of a virtual GICv3 or trigger in kvm_vgic_vcpu_nv_init()
292 /* Default GICv3 Maintenance Interrupt INTID, as per SBSA */ in vgic_setup_private_irq()
438 * If we are creating a VCPU with a GICv3 we must also register in vgic_init()
648 * is a GICv2. A GICv3 must be explicitly initialized by userspace using the in kvm_vgic_map_resources()
771 pfr1 |= SYS_FIELD_PREP_ENUM(ID_PFR1_EL1, GIC, GICv3);
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| H A D | vgic-mmio-v2.c | 392 /* GICv3 only uses ICH_AP1Rn for memory mapped (GICv2) guests */ in vgic_mmio_read_apr()
418 /* GICv3 only uses ICH_AP1Rn for memory mapped (GICv2) guests */ in vgic_mmio_write_apr()
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| H A D | vgic-mmio-v3.c | 376 /* report a GICv3 compliant implementation */ in vgic_mmio_read_v3_idregs()
601 * The GICv3 per-IRQ registers are split to control PPIs and SGIs in the
1104 * With GICv3 (and ARE=1) CPUs trigger SGIs by writing to a system register. in vgic_v3_dispatch_sgi()
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| /linux/include/linux/irqchip/ |
| H A D | arm-vgic-info.h | 16 /* Full GICv3, optionally with v2 compat */
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| /linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | socionext,synquacer-exiu.yaml | 15 level-high type GICv3 SPIs.
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| /linux/drivers/irqchip/ |
| H A D | irq-gic-v4.c | 18 * intricacies of GICv3, GICv4, and how a guest's view of a GICv3 gets
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| H A D | irq-gic-common.c | 111 * alone as they are in the redistributor registers on GICv3. in gic_dist_config()
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| /linux/tools/testing/selftests/arm64/fp/ |
| H A D | README | 76 --irqchip=gicv3. New kvmtool defaults to that if appropriate, but I
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| /linux/drivers/pci/controller/ |
| H A D | pcie-iproc.c | 238 * GICv3 ITS)
252 * programmed. When ARM GICv3 ITS is used, this should be programmed
1226 * Check if 'msi-map' points to ARM GICv3 ITS, which is the only in iproce_pcie_get_msi()
1234 /* derive GITS_TRANSLATER address from GICv3 */ in iproce_pcie_get_msi()
1289 /* steering MSI to GICv3 ITS */ in iproc_pcie_paxc_v2_msi_steer()
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| /linux/Documentation/arch/arm64/ |
| H A D | booting.rst | 267 For systems with a GICv3 interrupt controller to be used in v3 mode:
281 - The DT or ACPI tables must describe a GICv3 interrupt controller.
283 For systems with a GICv3 interrupt controller to be used in
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| /linux/arch/arm64/kernel/ |
| H A D | image-vars.h | 111 /* Static key indicating whether GICv3 has GICv2 compatibility */
|