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/linux/arch/arm64/kvm/hyp/
H A Dvgic-v2-cpuif-proxy.c27 * __vgic_v2_perform_cpuif_access -- perform a GICV access on behalf of the
33 * 1: GICV access successfully performed
34 * 0: Not a GICV access
35 * -1: Illegal GICV access successfully performed
49 /* If not for GICV, move on */ in __vgic_v2_perform_cpuif_access()
/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Darm,gic-v3.yaml79 - GIC Virtual CPU interface (GICV)
81 GICC, GICH and GICV are optional, but must be described if the CPUs
251 <0x2c020000 0x2000>; // GICV
280 <0x2c080000 0x2000>; // GICV
/linux/include/kvm/
H A Darm_vgic.h52 /* GICV mapping, kernel VA */
54 /* GICV mapping, HYP VA */
/linux/arch/arm64/boot/dts/marvell/
H A Darmada-ap810-ap0.dtsi61 <0x00e0000 0x2000>; /* GICV */
/linux/arch/arm64/kvm/vgic/
H A Dvgic-v2.c354 kvm_info("GICV region size/alignment is unsafe, using trapping (reduced performance)\n"); in vgic_v2_probe()
361 kvm_err("Cannot map GICV into hyp\n"); in vgic_v2_probe()
H A Dvgic-v3.c678 kvm_info("GICv3: no GICV resource entry\n"); in vgic_v3_probe()
682 pr_warn("GICV physical address 0x%llx not page aligned\n", in vgic_v3_probe()
/linux/arch/arm64/boot/dts/amd/
H A Delba.dtsi150 <0x0 0x60020000 0x0 0x2000>; /* GICV */
/linux/arch/arm64/boot/dts/broadcom/bcmbca/
H A Dbcm6856.dtsi90 <0x6000 0x2000>; /* GICV */
H A Dbcm6858.dtsi108 <0x6000 0x2000>; /* GICV */
/linux/arch/arm64/boot/dts/hisilicon/
H A Dhip05.dtsi250 <0x0 0xfe020000 0 0x10000>; /* GICV */
H A Dhi3798cv200.dtsi100 <0x0 0xf1006000 0x0 0x2000>; /* GICV */
H A Dhi3670.dtsi120 <0x0 0xe82b6000 0 0x2000>; /* GICV */
H A Dhip06.dtsi250 <0x0 0xfe020000 0 0x10000>; /* GICV */
H A Dhi3660.dtsi292 <0x0 0xe82b6000 0 0x2000>; /* GICV */
H A Dhip07.dtsi956 <0x0 0xfe020000 0x0 0x10000>; /* GICV */
/linux/arch/arm64/boot/dts/nuvoton/
H A Dma35d1.dtsi58 <0x0 0x50806000 0 0x2000>; /* GICV */
/linux/arch/arm64/boot/dts/microchip/
H A Dsparx5.dtsi119 <0x6 0x00210000 0x2000>, /* GICV */
/linux/arch/arm64/boot/dts/arm/
H A Dfvp-base-revc.dts233 <0x0 0x2c02f000 0 0x2000>; // GICV
/linux/arch/arm64/boot/dts/freescale/
H A Dfsl-ls1088a.dtsi120 <0x0 0x0c0e0000 0 0x20000>; /* GICV */
H A Dfsl-ls208xa.dtsi55 <0x0 0x0c0e0000 0 0x20000>; /* GICV */
H A Dfsl-lx2160a.dtsi390 <0x0 0x0c0e0000 0 0x20000>; // GICV
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8365.dtsi290 <0 0x0c420000 0 0x2000>; /* GICV */
/linux/arch/arm64/boot/dts/ti/
H A Dk3-am65-main.dtsi41 <0x00 0x6f020000 0x00 0x2000>; /* GICV */
/linux/drivers/irqchip/
H A Dirq-gic-v3.c2588 * The maintenance interrupt and GICV should be the same for every CPU in gic_acpi_parse_virt_madt_gicc()
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3399-base.dtsi650 <0x0 0xfff20000 0 0x10000>; /* GICV */