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Searched full:gcc_disp_gpll0_clk_src (Results 1 – 25 of 28) sorted by relevance

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/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,sc7180-dispcc.yaml34 - const: gcc_disp_gpll0_clk_src
59 <&gcc GCC_DISP_GPLL0_CLK_SRC>,
65 "gcc_disp_gpll0_clk_src",
H A Dqcom,qcm2290-dispcc.yaml35 - const: gcc_disp_gpll0_clk_src
61 <&gcc GCC_DISP_GPLL0_CLK_SRC>,
67 "gcc_disp_gpll0_clk_src",
H A Dqcom,sdm845-dispcc.yaml40 - const: gcc_disp_gpll0_clk_src
68 <&gcc GCC_DISP_GPLL0_CLK_SRC>,
77 "gcc_disp_gpll0_clk_src",
H A Dqcom,sm6375-dispcc.yaml47 <&gcc GCC_DISP_GPLL0_CLK_SRC>,
H A Dqcom,sc7280-dispcc.yaml63 <&gcc GCC_DISP_GPLL0_CLK_SRC>,
H A Dqcom,sm7150-dispcc.yaml62 <&gcc GCC_DISP_GPLL0_CLK_SRC>,
/linux/include/dt-bindings/clock/
H A Dqcom,gcc-sc7180.h34 #define GCC_DISP_GPLL0_CLK_SRC 24 macro
H A Dqcom,sm7150-gcc.h34 #define GCC_DISP_GPLL0_CLK_SRC 22 macro
H A Dqcom,gcc-qcm2290.h82 #define GCC_DISP_GPLL0_CLK_SRC 72 macro
H A Dqcom,gcc-sm6115.h174 #define GCC_DISP_GPLL0_CLK_SRC 166 macro
H A Dqcom,gcc-sc7280.h33 #define GCC_DISP_GPLL0_CLK_SRC 23 macro
H A Dqcom,sm6375-gcc.h95 #define GCC_DISP_GPLL0_CLK_SRC 84 macro
H A Dqcom,gcc-sdm845.h31 #define GCC_DISP_GPLL0_CLK_SRC 21 macro
/linux/drivers/clk/qcom/
H A Ddispcc-sc7180.c115 { .fw_name = "gcc_disp_gpll0_clk_src" },
126 { .fw_name = "gcc_disp_gpll0_clk_src" },
H A Ddispcc-sdm845.c92 { .fw_name = "gcc_disp_gpll0_clk_src", .name = "gcc_disp_gpll0_clk_src" },
H A Dgcc-qcm2290.c1844 static struct clk_regmap_div gcc_disp_gpll0_clk_src = { variable
1849 .name = "gcc_disp_gpll0_clk_src",
1864 { &gcc_disp_gpll0_clk_src.clkr.hw },
2820 [GCC_DISP_GPLL0_CLK_SRC] = &gcc_disp_gpll0_clk_src.clkr,
H A Dgcc-sdm845.c1473 static struct clk_branch gcc_disp_gpll0_clk_src = { variable
1479 .name = "gcc_disp_gpll0_clk_src",
3546 [GCC_DISP_GPLL0_CLK_SRC] = &gcc_disp_gpll0_clk_src.clkr,
3699 [GCC_DISP_GPLL0_CLK_SRC] = &gcc_disp_gpll0_clk_src.clkr,
H A Dgcc-sc7180.c1011 static struct clk_branch gcc_disp_gpll0_clk_src = { variable
1017 .name = "gcc_disp_gpll0_clk_src",
2260 [GCC_DISP_GPLL0_CLK_SRC] = &gcc_disp_gpll0_clk_src.clkr,
H A Dgcc-sm6115.c2159 static struct clk_regmap_div gcc_disp_gpll0_clk_src = { variable
2164 .name = "gcc_disp_gpll0_clk_src",
2179 &gcc_disp_gpll0_clk_src.clkr.hw,
3327 [GCC_DISP_GPLL0_CLK_SRC] = &gcc_disp_gpll0_clk_src.clkr,
H A Ddispcc-qcm2290.c105 { .fw_name = "gcc_disp_gpll0_clk_src" },
H A Dgcc-sm6375.c2328 static struct clk_regmap_div gcc_disp_gpll0_clk_src = { variable
2333 .name = "gcc_disp_gpll0_clk_src",
2350 &gcc_disp_gpll0_clk_src.clkr.hw,
3675 [GCC_DISP_GPLL0_CLK_SRC] = &gcc_disp_gpll0_clk_src.clkr,
H A Dgcc-sm7150.c1207 static struct clk_branch gcc_disp_gpll0_clk_src = { variable
1213 .name = "gcc_disp_gpll0_clk_src",
2774 [GCC_DISP_GPLL0_CLK_SRC] = &gcc_disp_gpll0_clk_src.clkr,
H A Dgcc-sc7280.c1476 static struct clk_branch gcc_disp_gpll0_clk_src = { variable
1482 .name = "gcc_disp_gpll0_clk_src",
3207 [GCC_DISP_GPLL0_CLK_SRC] = &gcc_disp_gpll0_clk_src.clkr,
/linux/arch/arm64/boot/dts/qcom/
H A Dsdm670.dtsi1648 <&gcc GCC_DISP_GPLL0_CLK_SRC>,
1657 "gcc_disp_gpll0_clk_src",
H A Dqcm2290.dtsi1786 <&gcc GCC_DISP_GPLL0_CLK_SRC>,
1792 "gcc_disp_gpll0_clk_src",

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