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/linux/tools/perf/pmu-events/arch/x86/skylake/
H A D	virtual-memory.json	35 …zes) caused by demand data loads. This implies it missed in the DTLB and further levels of TLB. Th… 44 …and data loads. This implies address translations missed in the DTLB and further levels of TLB. Th… 53 …and data loads. This implies address translations missed in the DTLB and further levels of TLB. Th… 62 …and data loads. This implies address translations missed in the DTLB and further levels of TLB. Th… 108 …es) caused by demand data stores. This implies it missed in the DTLB and further levels of TLB. Th… 117 …nd data stores. This implies address translations missed in the DTLB and further levels of TLB. Th… 126 …nd data stores. This implies address translations missed in the DTLB and further levels of TLB. Th… 135 …nd data stores. This implies address translations missed in the DTLB and further levels of TLB. Th… 171 …2M/4M/1G) caused by a code fetch. This implies it missed in the ITLB and further levels of TLB, bu… 198 …y a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. Th… [all …]
/linux/tools/perf/pmu-events/arch/x86/skylakex/
H A D	virtual-memory.json	35 …zes) caused by demand data loads. This implies it missed in the DTLB and further levels of TLB. Th… 44 …and data loads. This implies address translations missed in the DTLB and further levels of TLB. Th… 53 …and data loads. This implies address translations missed in the DTLB and further levels of TLB. Th… 62 …and data loads. This implies address translations missed in the DTLB and further levels of TLB. Th… 108 …es) caused by demand data stores. This implies it missed in the DTLB and further levels of TLB. Th… 117 …nd data stores. This implies address translations missed in the DTLB and further levels of TLB. Th… 126 …nd data stores. This implies address translations missed in the DTLB and further levels of TLB. Th… 135 …nd data stores. This implies address translations missed in the DTLB and further levels of TLB. Th… 171 …2M/4M/1G) caused by a code fetch. This implies it missed in the ITLB and further levels of TLB, bu… 198 …y a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. Th… [all …]
/linux/tools/perf/pmu-events/arch/x86/cascadelakex/
H A D	virtual-memory.json	35 …zes) caused by demand data loads. This implies it missed in the DTLB and further levels of TLB. Th… 44 …and data loads. This implies address translations missed in the DTLB and further levels of TLB. Th… 53 …and data loads. This implies address translations missed in the DTLB and further levels of TLB. Th… 62 …and data loads. This implies address translations missed in the DTLB and further levels of TLB. Th… 108 …es) caused by demand data stores. This implies it missed in the DTLB and further levels of TLB. Th… 117 …nd data stores. This implies address translations missed in the DTLB and further levels of TLB. Th… 126 …nd data stores. This implies address translations missed in the DTLB and further levels of TLB. Th… 135 …nd data stores. This implies address translations missed in the DTLB and further levels of TLB. Th… 171 …2M/4M/1G) caused by a code fetch. This implies it missed in the ITLB and further levels of TLB, bu… 198 …y a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. Th… [all …]
/linux/tools/perf/pmu-events/arch/x86/icelakex/
H A D	virtual-memory.json	26 …zes) caused by demand data loads. This implies it missed in the DTLB and further levels of TLB. Th… 35 …and data loads. This implies address translations missed in the DTLB and further levels of TLB. Th… 44 …and data loads. This implies address translations missed in the DTLB and further levels of TLB. Th… 53 …and data loads. This implies address translations missed in the DTLB and further levels of TLB. Th… 90 …es) caused by demand data stores. This implies it missed in the DTLB and further levels of TLB. Th… 99 …nd data stores. This implies address translations missed in the DTLB and further levels of TLB. Th… 108 …nd data stores. This implies address translations missed in the DTLB and further levels of TLB. Th… 117 …nd data stores. This implies address translations missed in the DTLB and further levels of TLB. Th… 154 …y a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. Th… 163 …y a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. Th… [all …]
/linux/tools/perf/pmu-events/arch/x86/sapphirerapids/
H A D	virtual-memory.json	26 …zes) caused by demand data loads. This implies it missed in the DTLB and further levels of TLB. Th… 35 …and data loads. This implies address translations missed in the DTLB and further levels of TLB. Th… 44 …and data loads. This implies address translations missed in the DTLB and further levels of TLB. Th… 53 …and data loads. This implies address translations missed in the DTLB and further levels of TLB. Th… 90 …es) caused by demand data stores. This implies it missed in the DTLB and further levels of TLB. Th… 99 …nd data stores. This implies address translations missed in the DTLB and further levels of TLB. Th… 108 …nd data stores. This implies address translations missed in the DTLB and further levels of TLB. Th… 117 …nd data stores. This implies address translations missed in the DTLB and further levels of TLB. Th… 154 …y a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. Th… 163 …y a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. Th… [all …]
H A D	other.json	`23 "BriefDescription": "Cycles the uncore cannot take further requests", 28 …umber of cycles when the thread is active and the uncore cannot take any further requests (for exa…`
/linux/tools/perf/pmu-events/arch/x86/emeraldrapids/
H A D	virtual-memory.json	26 …zes) caused by demand data loads. This implies it missed in the DTLB and further levels of TLB. Th… 35 …and data loads. This implies address translations missed in the DTLB and further levels of TLB. Th… 44 …and data loads. This implies address translations missed in the DTLB and further levels of TLB. Th… 53 …and data loads. This implies address translations missed in the DTLB and further levels of TLB. Th… 90 …es) caused by demand data stores. This implies it missed in the DTLB and further levels of TLB. Th… 99 …nd data stores. This implies address translations missed in the DTLB and further levels of TLB. Th… 108 …nd data stores. This implies address translations missed in the DTLB and further levels of TLB. Th… 117 …nd data stores. This implies address translations missed in the DTLB and further levels of TLB. Th… 154 …y a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. Th… 163 …y a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. Th… [all …]
H A D	other.json	`23 "BriefDescription": "Cycles the uncore cannot take further requests", 28 …umber of cycles when the thread is active and the uncore cannot take any further requests (for exa…`
/linux/tools/perf/pmu-events/arch/x86/graniterapids/
H A D	virtual-memory.json	26 …zes) caused by demand data loads. This implies it missed in the DTLB and further levels of TLB. Th… 35 …and data loads. This implies address translations missed in the DTLB and further levels of TLB. Th… 44 …and data loads. This implies address translations missed in the DTLB and further levels of TLB. Th… 53 …and data loads. This implies address translations missed in the DTLB and further levels of TLB. Th… 90 …es) caused by demand data stores. This implies it missed in the DTLB and further levels of TLB. Th… 99 …nd data stores. This implies address translations missed in the DTLB and further levels of TLB. Th… 108 …nd data stores. This implies address translations missed in the DTLB and further levels of TLB. Th… 117 …nd data stores. This implies address translations missed in the DTLB and further levels of TLB. Th… 154 …y a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. Th… 163 …y a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. Th… [all …]
/linux/tools/perf/pmu-events/arch/x86/rocketlake/
H A D	virtual-memory.json	26 "PublicDescription": "Counts completed page walks (all page sizes) caused by demand data loads. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 35 "PublicDescription": "Counts completed page walks (1G sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 44 "PublicDescription": "Counts completed page walks (2M/4M sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 53 "PublicDescription": "Counts completed page walks (4K sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 90 "PublicDescription": "Counts completed page walks (all page sizes) caused by demand data stores. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 99 "PublicDescription": "Counts completed page walks (1G sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 108 "PublicDescription": "Counts completed page walks (2M/4M sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 117 "PublicDescription": "Counts completed page walks (4K sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 154 "PublicDescription": "Counts completed page walks (all page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.", 163 "PublicDescription": "Counts completed page walks (2M/4M page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further level [all...]
/linux/tools/perf/pmu-events/arch/x86/icelake/
H A D	virtual-memory.json	26 "PublicDescription": "Counts completed page walks (all page sizes) caused by demand data loads. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 35 "PublicDescription": "Counts completed page walks (1G sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 44 "PublicDescription": "Counts completed page walks (2M/4M sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 53 "PublicDescription": "Counts completed page walks (4K sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 90 "PublicDescription": "Counts completed page walks (all page sizes) caused by demand data stores. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 99 "PublicDescription": "Counts completed page walks (1G sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 108 "PublicDescription": "Counts completed page walks (2M/4M sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 117 "PublicDescription": "Counts completed page walks (4K sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 154 "PublicDescription": "Counts completed page walks (all page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.", 163 "PublicDescription": "Counts completed page walks (2M/4M page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further level [all...]
/linux/tools/perf/pmu-events/arch/x86/alderlake/
H A D	virtual-memory.json	38 …zes) caused by demand data loads. This implies it missed in the DTLB and further levels of TLB. Th… 48 …and data loads. This implies address translations missed in the DTLB and further levels of TLB. Th… 58 …and data loads. This implies address translations missed in the DTLB and further levels of TLB. Th… 68 …and data loads. This implies address translations missed in the DTLB and further levels of TLB. Th… 119 …es) caused by demand data stores. This implies it missed in the DTLB and further levels of TLB. Th… 129 …nd data stores. This implies address translations missed in the DTLB and further levels of TLB. Th… 139 …nd data stores. This implies address translations missed in the DTLB and further levels of TLB. Th… 149 …nd data stores. This implies address translations missed in the DTLB and further levels of TLB. Th… 218 …y a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. Th… 228 …y a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. Th… [all …]
/linux/crypto/
H A D	Kconfig	402 for further information. 430 See https://www.schneier.com/blowfish.html for further information. 449 See https://info.isl.ntt.co.jp/crypt/eng/camellia/ for further information. 501 for further information. 516 for further information. 527 See https://www.cl.cam.ac.uk/~rja14/serpent.html for further information. 555 See https://eprint.iacr.org/2008/329.pdf for further information. 589 See https://www.schneier.com/twofish.html for further information. 648 Bernstein and further specified in RFC7539 for use in IETF protocols. 650 https://cr.yp.to/chacha/chacha-20080128.pdf for further information. [all …]
/linux/tools/perf/pmu-events/arch/x86/tigerlake/
H A D	virtual-memory.json	26 "PublicDescription": "Counts completed page walks (all page sizes) caused by demand data loads. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 35 "PublicDescription": "Counts completed page walks (1G sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 44 "PublicDescription": "Counts completed page walks (2M/4M sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 53 "PublicDescription": "Counts completed page walks (4K sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 90 "PublicDescription": "Counts completed page walks (all page sizes) caused by demand data stores. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 154 "PublicDescription": "Counts completed page walks (all page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.", 163 "PublicDescription": "Counts completed page walks (2M/4M page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.", 172 "PublicDescription": "Counts completed page walks (4K page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.",
/linux/tools/perf/pmu-events/arch/x86/meteorlake/
H A D	virtual-memory.json	46 …zes) caused by demand data loads. This implies it missed in the DTLB and further levels of TLB. Th… 56 …and data loads. This implies address translations missed in the DTLB and further levels of TLB. Th… 76 …and data loads. This implies address translations missed in the DTLB and further levels of TLB. Th… 96 …and data loads. This implies address translations missed in the DTLB and further levels of TLB. Th… 165 …es) caused by demand data stores. This implies it missed in the DTLB and further levels of TLB. Th… 175 …nd data stores. This implies address translations missed in the DTLB and further levels of TLB. Th… 195 …nd data stores. This implies address translations missed in the DTLB and further levels of TLB. Th… 215 …nd data stores. This implies address translations missed in the DTLB and further levels of TLB. Th… 294 …y a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. Th… 314 …y a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. Th… [all …]
/linux/Documentation/admin-guide/cgroup-v1/
H A D	blkio-controller.rst	152 are further divided by the type of operation - read or write, sync 159 are further divided by the type of operation - read or write, sync 172 io_service_time > actual time elapsed. This time is further divided by 188 devices too. This time is further divided by the type of operation - 195 cgroup. This is further divided by the type of operation - read or 200 cgroup. This is further divided by the type of operation - read or 285 are further divided by the type of operation - read or write, sync 292 are further divided by the type of operation - read or write, sync
/linux/include/uapi/scsi/
H A D	scsi_bsg_ufs.h	`101 * @index: Index to further identify data B-2 102 * @selector: Index to further identify data B-3 124 * @index: Index to further identify data B-2 125 * @selector: Index to further identify data B-3 200 * be no further reply information supplied.`
/linux/Documentation/ABI/testing/
H A D	evm	`29 31 Disable further runtime modification of EVM policy 43 HMAC creation and disable all further modification of policy. 51 disable all further modification of policy. This option is now 107 a single period (.) will lock the xattr list from any further`
/linux/tools/perf/pmu-events/arch/x86/lunarlake/
H A D	virtual-memory.json	65 …zes) caused by demand data loads. This implies it missed in the DTLB and further levels of TLB. Th… 75 …and data loads. This implies address translations missed in the DTLB and further levels of TLB. Th… 95 …and data loads. This implies address translations missed in the DTLB and further levels of TLB. Th… 115 …and data loads. This implies address translations missed in the DTLB and further levels of TLB. Th… 204 …es) caused by demand data stores. This implies it missed in the DTLB and further levels of TLB. Th… 214 …nd data stores. This implies address translations missed in the DTLB and further levels of TLB. Th… 234 …nd data stores. This implies address translations missed in the DTLB and further levels of TLB. Th… 254 …nd data stores. This implies address translations missed in the DTLB and further levels of TLB. Th… 352 …y a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. Th… 372 …y a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. Th… [all …]
/linux/tools/perf/pmu-events/arch/x86/pantherlake/
H A D	virtual-memory.json	`17 …zes) caused by demand data loads. This implies it missed in the DTLB and further levels of TLB. Th… 37 …es) caused by demand data stores. This implies it missed in the DTLB and further levels of TLB. Th… 57 …y a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. Th…`
/linux/Documentation/process/
H A D	embargoed-hardware-issues.rst	`18 which need further coordination. 100 response team can bring in further developers (domain experts) to address 137 further disclosure, and coordination of fixes. 175 a sufficient starting point, and further technical clarification is best 195 The initial response team will identify further experts from the Linux 197 further experts to be included, each of which will be subject to the same 285 reporting process and further handling. Ambassadors are not involved in the`
/linux/drivers/net/wireless/silabs/wfx/
H A D	Kconfig	`3 tristate "Silicon Labs wireless chips WF200 and further" 8 This is a driver for Silicons Labs WFxxx series (WF200 and further)`
/linux/Documentation/virt/coco/
H A D	sev-guest.rst	`101 specification for further details. 115 SEV-SNP firmware to derive the key. See SEV-SNP specification for further details 119 the SEV-SNP specification for further details. 142 See GHCB specification for further detail on how to parse the certificate blob. 153 specification for further details.`
/linux/drivers/net/ethernet/freescale/fman/
H A D	Kconfig	`23 internal resource leak thus stopping further packet processing. 28 stall further packet processing. The issue can occur with any`
/linux/include/linux/
H A D	lru_cache.h	`101 is moved further over the available indices with each such transaction. 216 /* annotate that the set is "dirty", possibly accumulating further 220 /* Locked, no further changes allowed. 226 * further references, to guarantee that eventually some refcnt will 277 * lock, which means there are no pending changes, and any further attempt to`

12 3 4 5 6 7 8 9 10 >>...75