Home
last modified time | relevance | path

Searched full:fu540 (Results 1 – 25 of 31) sorted by relevance

12

/freebsd/sys/contrib/device-tree/src/riscv/sifive/
H A Dfu540-c000.dtsi6 #include <dt-bindings/clock/sifive-fu540-prci.h>
11 compatible = "sifive,fu540-c000", "sifive,fu540";
182 compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";
196 compatible = "sifive,fu540-c000-prci";
202 compatible = "sifive,fu540-c000-uart", "sifive,uart0";
210 compatible = "sifive,fu540-c000-pdma", "sifive,pdma0";
219 compatible = "sifive,fu540-c000-uart", "sifive,uart0";
227 compatible = "sifive,fu540-c000-i2c", "sifive,i2c0";
239 compatible = "sifive,fu540
[all...]
H A Dhifive-unleashed-a00.dts4 #include "fu540-c000.dtsi"
14 compatible = "sifive,hifive-unleashed-a00", "sifive,fu540-c000",
15 "sifive,fu540";
/freebsd/sys/contrib/device-tree/Bindings/clock/sifive/
H A Dfu540-prci.yaml5 $id: http://devicetree.org/schemas/clock/sifive/fu540-prci.yaml#
8 title: SiFive FU540 Power Reset Clock Interrupt Controller (PRCI)
14 On the FU540 family of SoCs, most system-wide clock and reset integration
17 macros defined in include/dt-bindings/clock/sifive-fu540-prci.h.
26 const: sifive,fu540-c000-prci
55 compatible = "sifive,fu540-c000-prci";
H A Dfu540-prci.txt1 SiFive FU540 PRCI bindings
3 On the FU540 family of SoCs, most system-wide clock and reset integration
8 supported: "sifive,fu540-c000-prci"
17 macros defined in include/dt-bindings/clock/sifive-fu540-prci.h.
42 compatible = "sifive,fu540-c000-prci";
/freebsd/sys/contrib/device-tree/Bindings/dma/
H A Dsifive,fu540-c000-pdma.yaml4 $id: http://devicetree.org/schemas/dma/sifive,fu540-c000-pdma.yaml#
23 https://static.dev.sifive.com/FU540-C000-v1.0.pdf
33 - sifive,fu540-c000-pdma
38 "sifive,fu540-c000-pdma" for the SiFive PDMA v0 as integrated onto the
39 SiFive FU540 chip resp and "sifive,pdma0" for the SiFive PDMA v0 IP block
68 compatible = "sifive,fu540-c000-pdma", "sifive,pdma0";
/freebsd/sys/contrib/device-tree/Bindings/pwm/
H A Dpwm-sifive.yaml30 - sifive,fu540-c000-pwm
35 compatible strings are "sifive,fu540-c000-pwm" and
37 SiFive FU540 and FU740 chip respectively, and "sifive,pwm0" for the
53 Each PWM instance in FU540-C000 has 4 comparators. One interrupt per comparator.
66 compatible = "sifive,fu540-c000-pwm", "sifive,pwm0";
H A Dpwm-sifive.txt14 Supported compatible strings are: "sifive,fu540-c000-pwm" for the SiFive
15 PWM v0 as integrated onto the SiFive FU540 chip, and "sifive,pwm0" for the
27 compatible = "sifive,fu540-c000-pwm", "sifive,pwm0";
/freebsd/sys/contrib/device-tree/Bindings/gpio/
H A Dsifive,gpio.yaml16 - sifive,fu540-c000-gpio
69 - sifive,fu540-c000-gpio
79 #include <dt-bindings/clock/sifive-fu540-prci.h>
81 compatible = "sifive,fu540-c000-gpio", "sifive,gpio0";
/freebsd/sys/contrib/device-tree/Bindings/spi/
H A Dspi-sifive.yaml21 - sifive,fu540-c000-spi
28 "sifive,fu540-c000-spi" and "sifive,fu740-c000-spi" for the SiFive SPI v0
29 as integrated onto the SiFive FU540 and FU740 chip resp, and "sifive,spi0"
76 compatible = "sifive,fu540-c000-spi", "sifive,spi0";
/freebsd/sys/contrib/device-tree/Bindings/riscv/
H A Dsifive-l2-cache.yaml25 - sifive,fu540-c000-ccache
36 - sifive,fu540-c000-ccache
41 - const: sifive,fu540-c000-ccache
133 compatible = "sifive,fu540-c000-ccache", "cache";
H A Dsifive,ccache0.yaml25 - sifive,fu540-c000-ccache
37 - sifive,fu540-c000-ccache
46 - const: sifive,fu540-c000-ccache
157 compatible = "sifive,fu540-c000-ccache", "cache";
H A Dsifive.yaml24 - const: sifive,fu540-c000
25 - const: sifive,fu540
H A Dsifive-l2-cache.txt10 - compatible: Should be "sifive,fu540-c000-ccache" and "cache"
40 compatible = "sifive,fu540-c000-ccache", "cache";
/freebsd/sys/contrib/device-tree/Bindings/cache/
H A Dsifive,ccache0.yaml25 - sifive,fu540-c000-ccache
37 - sifive,fu540-c000-ccache
48 - const: sifive,fu540-c000-ccache
161 compatible = "sifive,fu540-c000-ccache", "cache";
/freebsd/sys/contrib/device-tree/Bindings/serial/
H A Dsifive-serial.yaml21 - sifive,fu540-c000-uart
56 #include <dt-bindings/clock/sifive-fu540-prci.h>
58 compatible = "sifive,fu540-c000-uart", "sifive,uart0";
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dmacb.txt17 Use "sifive,fu540-c000-gem" for SiFive FU540-C000 SoC.
22 For "sifive,fu540-c000-gem", second range is required to specify the
H A Dcdns,macb.yaml57 - sifive,fu540-c000-gem # SiFive FU540-C000 SoC
71 - description: GEMGXL Management block registers on SiFive FU540-C000 SoC
171 const: sifive,fu540-c000-gem
/freebsd/sys/contrib/device-tree/Bindings/timer/
H A Dsifive,clint.yaml33 - sifive,fu540-c000-clint # SiFive FU540
74 compatible = "sifive,fu540-c000-clint", "sifive,clint0";
/freebsd/sys/riscv/sifive/
H A Dsifive_prci.c97 /* Called devicesresetreg on the FU540 */
164 /* FU540 clock numbers */
170 /* FU540 registers */
175 /* FU540 PLL clocks */
183 /* FU540 fixed divisor clock TLCLK. */
194 /* FU540 config */
268 { "sifive,fu540-c000-prci", (uintptr_t)&fu540_prci_config },
/freebsd/sys/contrib/device-tree/Bindings/sifive/
H A Dsifive-blocks-ip-versioning.txt30 "sifive,fu540-c000-uart". This way, if SoC-specific
38 compatible = "sifive,fu540-c000-uart", "sifive,uart0";
/freebsd/sys/contrib/device-tree/Bindings/i2c/
H A Di2c-ocores.txt6 "sifive,fu540-c000-i2c", "sifive,i2c0"
8 FU540-C000 SoC.
H A Dopencores,i2c-ocores.yaml22 - sifive,fu540-c000-i2c # Opencore based IP block FU540-C000 SoC
/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Dsifive,plic-1.0.0.yaml61 - sifive,fu540-c000-plic
166 compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";
H A Driscv,cpu-intc.txt49 compatible = "sifive,fu540-c000-cpu-intc", "riscv,cpu-intc";
/freebsd/sys/contrib/device-tree/src/riscv/microchip/
H A Dmicrochip-mpfs.dtsi156 compatible = "sifive,fu540-c000-ccache", "cache";
168 compatible = "sifive,fu540-c000-clint", "sifive,clint0";
178 compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";

12