Searched full:fiu (Results 1 – 7 of 7) sorted by relevance
| /linux/Documentation/devicetree/bindings/spi/ |
| H A D | nuvoton,wpcm450-fiu.yaml | 4 $id: http://devicetree.org/schemas/spi/nuvoton,wpcm450-fiu.yaml# 7 title: Nuvoton WPCM450 Flash Interface Unit (FIU) 17 const: nuvoton,wpcm450-fiu 21 - description: FIU registers 49 compatible = "nuvoton,wpcm450-fiu";
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| /linux/Documentation/ABI/testing/ |
| H A D | sysfs-bus-dfl | 5 Description: Read-only. It returns type of DFL FIU of the device. Now DFL 6 supports 2 FIU types, 0 for FME, 1 for PORT. 14 Description: Read-only. It returns feature identifier local to its DFL FIU
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| /linux/include/linux/ |
| H A D | dfl.h | 15 * enum dfl_id_type - define the DFL FIU types 28 * @type: type of DFL FIU of the device. See enum dfl_id_type. 29 * @feature_id: feature identifier local to its DFL FIU type.
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| /linux/Documentation/fpga/ |
| H A D | dfl.rst | 25 FPGA Interface Unit (FIU), Accelerated Function Unit (AFU) and Private Features, 31 | FIU | | | Private | | | Private | | | Private | 56 FPGA Interface Unit (FIU) represents a standalone functional unit for the 61 always connects to a FIU (e.g. a Port) as its child as illustrated above. 63 Private Features represent sub features of the FIU and AFU. They could be 65 belong to the same FIU or AFU, must be linked to one list via the Next Device 68 Each FIU, AFU and Private Feature could implement its own functional registers. 69 The functional register set for FIU and AFU, is named as Header Register Set, 197 FIU - FME (FPGA Management Engine) 249 FIU - PORT [all …]
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| /linux/arch/arm/boot/dts/nuvoton/ |
| H A D | nuvoton-wpcm450-supermicro-x9sci-ln4f.dts | 61 &fiu {
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| H A D | nuvoton-wpcm450.dtsi | 478 fiu: spi-controller@c8000000 { label 479 compatible = "nuvoton,wpcm450-fiu";
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| H A D | nuvoton-npcm750-runbmc-olympus.dts | 147 npcm,fiu-rx-bus-width = <2>;
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