Searched full:fifo0 (Results 1 – 11 of 11) sorted by relevance
35 - description: DMA controller phandle and request line for FIFO040 - const: fifo078 dma-names = "fifo0", "fifo1";
117 dma-names = "fifo0", "fifo1";136 dma-names = "fifo0", "fifo1";
432 dma-names = "fifo0", "fifo1";452 dma-names = "fifo0", "fifo1";
12 #define FOTG210_MAX_FIFO_NUM 4 /* fifo0...fifo4 */
309 * FIFO1 interrupts are used by ADC. Handle FIFO0 IRQs here only in titsc_irq()
160 * FIFO0 interrupts are used by TSC. Handle FIFO1 IRQs here only in tiadc_irq_h()
723 * - Can't used for singel dataline/FIFO case except the FIFO0 in fsl_sai_hw_params()725 * are successive and start from FIFO0 in fsl_sai_hw_params()
648 * task from fifo0, fifo1 would be neglected at the end of each in fsl_ssi_startup()
950 * that also used in bacward order. FIFO0 cannot be rate limited. in cpsw_set_cbs()
104 * @fifo_index: For Dedicated FIFO operation, only FIFO0 can be used for EP0.
634 netdev_dbg(dev, "no messages in fifo0\n"); in m_can_do_rx_poll()