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/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dstm32mp15xx-dhcom-som.dtsi468 * set MCO2 output to 50 MHz to supply ETHRX clock with PLL4P/2,
469 * so that MCO2 behaves as a divider for the ETHRX clock here.
H A Dstm32mp151.dtsi1777 <&rcc ETHRX>,
/freebsd/sys/contrib/device-tree/include/dt-bindings/clock/
H A Dstm32mp1-clks.h117 #define ETHRX 104 macro
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dstm32-dwmac.yaml180 <&rcc ETHRX>,