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Searched full:emc_dli_trim_txdqs5 (Results 1 – 8 of 8) sorted by relevance

/linux/arch/arm/boot/dts/nvidia/
H A Dtegra30-asus-nexus7-grouper-memory-timings.dtsi393 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
497 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
601 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
705 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
807 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
910 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
1018 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
1122 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
1226 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
1330 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
[all …]
H A Dtegra30-asus-nexus7-tilapia-memory-timings.dtsi88 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
192 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
295 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
H A Dtegra124-nyan-big-emc.dtsi1252 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
1420 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
1588 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
1756 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
1924 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
2092 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
2260 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
2428 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
2596 0x00000001 /* EMC_DLI_TRIM_TXDQS5 */
2764 0x00000003 /* EMC_DLI_TRIM_TXDQS5 */
[all …]
H A Dtegra30-ouya.dts2731 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
2833 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
2935 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
3037 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
3137 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
3238 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
3344 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
3446 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
3548 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
3650 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
[all …]
/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dnvidia,tegra30-emc.yaml181 - description: EMC_DLI_TRIM_TXDQS5
326 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
H A Dnvidia,tegra124-emc.yaml270 - description: EMC_DLI_TRIM_TXDQS5
503 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
/linux/drivers/memory/tegra/
H A Dtegra124-emc.c196 #define EMC_DLI_TRIM_TXDQS5 0x3bc macro
400 EMC_DLI_TRIM_TXDQS5,
H A Dtegra30-emc.c140 #define EMC_DLI_TRIM_TXDQS5 0x3bc macro
302 [63] = EMC_DLI_TRIM_TXDQS5,