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/linux/Documentation/devicetree/bindings/fuse/
H A Drenesas,rcar-efuse.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/fuse/renesas,rcar-efuse.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: R-Car E-FUSE connected to PFC
10 - Geert Uytterhoeven <geert+renesas@glider.be>
13 The E-FUSE is a type of non-volatile memory, which is accessible through the
14 Pin Function Controller (PFC) on some R-Car Gen4 SoCs.
19 - renesas,r8a779a0-efuse # R-Car V3U
20 - renesas,r8a779f0-efuse # R-Car S4-8
[all …]
H A Drenesas,rcar-otp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/fuse/renesas,rcar-otp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: R-Car E-FUSE connected to OTP_MEM
10 - Geert Uytterhoeven <geert+renesas@glider.be>
13 The E-FUSE is a type of non-volatile memory, which is accessible through the
14 One-Time Programmable Memory (OTP_MEM) module on some R-Car Gen4 SoCs.
19 - renesas,r8a779g0-otp # R-CarV4H
20 - renesas,r8a779h0-otp # R-CarV4M
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/linux/drivers/staging/rtl8712/
H A Drtl8712_efuse.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved.
24 static int efuse_available_max_size = EFUSE_MAX_SIZE - 3 /*0x1FD*/;
31 /* -----------------e-fuse pwr & clk reg ctrl --------------- in efuse_reg_ctrl()
42 /* -----------------e-fuse pwr & clk reg ctrl ----------------- in efuse_reg_ctrl()
54 * Before write E-Fuse, this function must be called.
70 /* -----------------e-fuse reg ctrl --------------------------------- */ in efuse_one_byte_read()
93 /* -----------------e-fuse reg ctrl -------------------------------- */ in efuse_one_byte_write()
115 /* -----------------e-fuse reg ctrl --------------------------------- */ in efuse_one_byte_rw()
150 /* read one byte to check if E-Fuse is empty */ in efuse_is_empty()
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H A Drtl8712_syscfg_bitdef.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved.
64 * 0: System clock(L-Bus)
120 /*--------------------------------------------------------------------------*/
121 /* SPS1_CTRL bits (Offset 0x18-1E, 56bits)*/
122 /*--------------------------------------------------------------------------*/
126 /*----------------------------------------------------------------------------*/
128 /*----------------------------------------------------------------------------*/
131 /*----------------------------------------------------------------------------*/
133 /*----------------------------------------------------------------------------*/
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/linux/Documentation/devicetree/bindings/opp/
H A Dopp-v2-qcom-level.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/opp/opp-v2-qcom-level.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Niklas Cassel <nks@flawful.org>
13 - $ref: opp-v2-base.yaml#
17 const: operating-points-v2-qcom-level
20 '^opp-?[0-9]+$':
25 opp-level: true
27 qcom,opp-fuse-level:
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/linux/drivers/staging/rtl8723bs/core/
H A Drtw_efuse.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
30 #define EFUSE_CTRL REG_EFUSE_CTRL /* E-Fuse Control. */
40 *Value = fakeBTEfuseContent[fakeEfuseBank - 1][Offset]; in Efuse_Read1ByteFromFakeContent()
52 fakeBTEfuseContent[fakeEfuseBank - 1][Offset] = Value; in Efuse_Write1ByteToFakeContent()
56 /*-----------------------------------------------------------------------------
73 *---------------------------------------------------------------------------*/
80 padapter->HalFunc.EfusePowerSwitch(padapter, bWrite, PwrState); in Efuse_PowerSwitch()
83 /*-----------------------------------------------------------------------------
98 *---------------------------------------------------------------------------*/
[all …]
/linux/Documentation/filesystems/
H A Dfuse.rst1 .. SPDX-License-Identifier: GPL-2.0
4 FUSE title
18 Non-privileged mount (or user mount):
19 A userspace filesystem mounted by a non-privileged (non-root) user.
37 What is FUSE?
40 FUSE is a userspace filesystem framework. It consists of a kernel
41 module (fuse.ko), a userspace library (libfuse.*) and a mount utility
44 One of the most important features of FUSE is allowing secure,
45 non-privileged mounts. This opens up new possibilities for the use of
50 `FUSE homepage: <https://github.com/libfuse/>`_
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H A Ddax.rst6 ----------
12 For block devices that are memory-like, the page cache pages would be
19 -----
30 ------------------------------
32 When mounting the filesystem, use the ``-o dax`` option on the command line or
34 within the filesystem. It is equivalent to the ``-o dax=always`` behavior below.
38 ----------------------------
41 -------
43 1. There exists an in-kernel file access mode flag `S_DAX` that corresponds to
61 ``-o dax=inode`` means "follow `FS_XFLAG_DAX`" and is the default.
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/linux/drivers/pmdomain/qcom/
H A Dcpr.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
27 #include <linux/nvmem-consumer.h>
29 /* Register Offsets for RB-CPR and Bit Definitions */
125 #define FUSE_REVISION_UNKNOWN (-1)
146 /* fuse quot */
150 /* fuse quot_offset */
254 return !drv->loop_disabled; in cpr_is_allowed()
259 writel_relaxed(value, drv->base + offset); in cpr_write()
264 return readl_relaxed(drv->base + offset); in cpr_read()
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/linux/tools/testing/selftests/
H A Dkselftest_deps.sh2 # SPDX-License-Identifier: GPL-2.0
13 echo -e "Usage: $0 -[p] <compiler> [test_name]\n"
14 echo -e "\tkselftest_deps.sh [-p] gcc"
15 echo -e "\tkselftest_deps.sh [-p] gcc mm"
16 echo -e "\tkselftest_deps.sh [-p] aarch64-linux-gnu-gcc"
17 echo -e "\tkselftest_deps.sh [-p] aarch64-linux-gnu-gcc mm\n"
18 echo "- Should be run in selftests directory in the kernel repo."
19 echo "- Checks if Kselftests can be built/cross-built on a system."
20 echo "- Parses all test/sub-test Makefile to find library dependencies."
21 echo "- Runs compile test on a trivial C file with LDLIBS specified"
[all …]
/linux/drivers/nvmem/
H A Dimx-ocotp.c1 // SPDX-License-Identifier: GPL-2.0-only
14 * Copyright (C) 2010-2013 Freescale Semiconductor, Inc
21 #include <linux/nvmem-provider.h>
69 #define TIMING_STROBE_PROG_US 10 /* Min time to blow a fuse */
106 void __iomem *base = priv->base; in imx_ocotp_wait_for_busy()
108 bm_ctrl_busy = priv->params->ctrl.bm_busy; in imx_ocotp_wait_for_busy()
109 bm_ctrl_error = priv->params->ctrl.bm_error; in imx_ocotp_wait_for_busy()
113 for (count = 10000; count >= 0; count--) { in imx_ocotp_wait_for_busy()
123 * - A write is performed to a shadow register during a shadow in imx_ocotp_wait_for_busy()
127 * - A write is performed to a shadow register which has been in imx_ocotp_wait_for_busy()
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/linux/drivers/gpu/drm/i915/gt/
H A Dintel_sseu.c1 // SPDX-License-Identifier: MIT
17 sseu->max_slices = max_slices; in intel_sseu_set_info()
18 sseu->max_subslices = max_subslices; in intel_sseu_set_info()
19 sseu->max_eus_per_subslice = max_eus_per_subslice; in intel_sseu_set_info()
27 if (sseu->has_xehp_dss) in intel_sseu_subslice_total()
28 return bitmap_weight(sseu->subslice_mask.xehp, in intel_sseu_subslice_total()
29 XEHP_BITMAP_BITS(sseu->subslice_mask)); in intel_sseu_subslice_total()
31 for (i = 0; i < ARRAY_SIZE(sseu->subslice_mask.hsw); i++) in intel_sseu_subslice_total()
32 total += hweight8(sseu->subslice_mask.hsw[i]); in intel_sseu_subslice_total()
40 WARN_ON(sseu->has_xehp_dss); in intel_sseu_get_hsw_subslices()
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H A Dintel_gt_mcr.c1 // SPDX-License-Identifier: MIT
18 * independent values of a register per hardware unit (e.g., per-subslice,
19 * per-L3bank, etc.). The specific types of replication that exist vary
20 * per-platform.
24 * registers can be done in either a (i.e., a single write updates all
38 #define HAS_MSLICE_STEERING(i915) (INTEL_INFO(i915)->has_mslice_steering)
62 { 0x00E900, 0x00FFFF }, /* 0xEA00 - OxEFFF is unused */
93 { 0x008140, 0x00815F }, /* SLICE (0x8140-0x814F), DSS (0x8150-0x815F) */
94 { 0x0094D0, 0x00955F }, /* SLICE (0x94D0-0x951F), DSS (0x9520-0x955F) */
98 { 0x00DE80, 0x00E8FF }, /* DSS (0xE000-0xE0FF reserved) */
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/linux/Documentation/dev-tools/
H A Dgdb-kernel-debugging.rst6 The kernel debugger kgdb, hypervisors like QEMU or JTAG-based hardware
16 ------------
18 - gdb 7.2+ (recommended: 7.4+) with python support enabled (typically true
23 -----
25 - Create a virtual Linux machine for QEMU/KVM (see www.linux-kvm.org and
26 www.qemu.org for more details). For cross-development,
30 - Build the kernel with CONFIG_GDB_SCRIPTS enabled, but leave
34 - Install that kernel on the guest, turn off KASLR if necessary by adding
36 Alternatively, QEMU allows to boot the kernel directly using -kernel,
37 -append, -initrd command line switches. This is generally only useful if
[all …]
/linux/drivers/phy/tegra/
H A Dxusb-tegra124.c1 // SPDX-License-Identifier: GPL-2.0-only
17 #include <soc/tegra/fuse.h>
216 struct tegra124_xusb_fuse_calibration fuse; member
229 mutex_lock(&padctl->lock); in tegra124_xusb_padctl_enable()
231 if (padctl->enable++ > 0) in tegra124_xusb_padctl_enable()
251 mutex_unlock(&padctl->lock); in tegra124_xusb_padctl_enable()
259 mutex_lock(&padctl->lock); in tegra124_xusb_padctl_disable()
261 if (WARN_ON(padctl->enable == 0)) in tegra124_xusb_padctl_disable()
264 if (--padctl->enable > 0) in tegra124_xusb_padctl_disable()
284 mutex_unlock(&padctl->lock); in tegra124_xusb_padctl_disable()
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/linux/fs/fuse/
H A Dinode.c2 FUSE: Filesystem in Userspace
3 Copyright (C) 2001-2008 Miklos Szeredi <miklos@szeredi.hu>
78 sl->forget = fuse_alloc_forget(); in fuse_alloc_submount_lookup()
79 if (!sl->forget) in fuse_alloc_submount_lookup()
97 fi->i_time = 0; in fuse_alloc_inode()
98 fi->inval_mask = ~0; in fuse_alloc_inode()
99 fi->nodeid = 0; in fuse_alloc_inode()
100 fi->nlookup = 0; in fuse_alloc_inode()
101 fi->attr_version = 0; in fuse_alloc_inode()
102 fi->orig_ino = 0; in fuse_alloc_inode()
[all …]
H A Ddev.c2 FUSE: Filesystem in Userspace
3 Copyright (C) 2001-2008 Miklos Szeredi <miklos@szeredi.hu>
29 MODULE_ALIAS("devname:fuse");
42 * Lockless access is OK, because file->private data is set in fuse_get_dev()
45 return READ_ONCE(file->private_data); in fuse_get_dev()
50 INIT_LIST_HEAD(&req->list); in fuse_request_init()
51 INIT_LIST_HEAD(&req->intr_entry); in fuse_request_init()
52 init_waitqueue_head(&req->waitq); in fuse_request_init()
53 refcount_set(&req->count, 1); in fuse_request_init()
54 __set_bit(FR_PENDING, &req->flags); in fuse_request_init()
[all …]
H A Dvirtio_fs.c1 // SPDX-License-Identifier: GPL-2.0
3 * virtio-fs: Virtio Filesystem
25 /* Used to help calculate the FUSE connection's max_pages limit for a request's
31 /* List of virtio-fs device instances and a lock for the list. Also provides
47 /* Per-virtqueue state */
50 struct virtqueue *vq; /* protected by ->lock */
63 /* A virtio-fs device instance */
124 struct fuse_fs_context *ctx = fsc->fs_private; in virtio_fs_parse_param()
133 ctx->dax_mode = FUSE_DAX_ALWAYS; in virtio_fs_parse_param()
136 ctx->dax_mode = result.uint_32; in virtio_fs_parse_param()
[all …]
/linux/Documentation/translations/it_IT/process/
H A Dchanges.rst1 .. include:: ../disclaimer-ita.rst
17 Questo documento è basato sul file "Changes" del kernel 2.0.x e quindi le
19 Alessandro Sigala, e tanti altri nella rete).
35 GNU C 5.1 gcc --version
36 Clang/LLVM (optional) 13.0.0 clang --version
37 Rust (opzionale) 1.76.0 rustc --version
38 bindgen (opzionale) 0.65.1 bindgen --version
39 GNU make 3.81 make --version
40 bash 4.2 bash --version
41 binutils 2.25 ld -v
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/linux/Documentation/devicetree/bindings/thermal/
H A Dimx-thermal.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/thermal/imx-thermal.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
15 - enum:
16 - fsl,imx6q-tempmon
17 - fsl,imx6sx-tempmon
18 - fsl,imx7d-tempmon
19 - items:
[all …]
/linux/drivers/gpu/drm/msm/adreno/
H A Dadreno_gpu.h1 /* SPDX-License-Identifier: GPL-2.0-only */
33 * @enum adreno_family: identify generation and possibly sub-generation
35 * In some cases there are distinct sub-generations within a major revision
37 * necessary sub-generation.
81 uint16_t fuse; member
90 * @chipids: Table of matching chip-ids
108 * @speedbins: Optional table of fuse to speedbin mappings
110 * Consists of pairs of fuse, index mappings, terminated with
130 * fuse | speedbin
131 * -----+---------
[all …]
H A Da6xx_gpu.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2017-2019 The Linux Foundation. All rights reserved. */
15 #include <linux/soc/qcom/llcc-qcom.h>
25 if (!adreno_has_gmu_wrapper(adreno_gpu) && !a6xx_gmu_isidle(&a6xx_gpu->gmu)) in _a6xx_check_idle()
45 gpu->name, __builtin_return_address(0), in a6xx_idle()
62 if (a6xx_gpu->has_whereami && !adreno_gpu->base.hw_apriv) { in update_shadow_rptr()
76 spin_lock_irqsave(&ring->preempt_lock, flags); in a6xx_flush()
79 ring->cur = ring->next; in a6xx_flush()
84 spin_unlock_irqrestore(&ring->preempt_lock, flags); in a6xx_flush()
106 bool sysprof = refcount_read(&a6xx_gpu->base.base.sysprof_active) > 1; in a6xx_set_pagetable()
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/linux/arch/arm/boot/dts/marvell/
H A Dorion5x-lacie-d2-network.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include "orion5x-mv88f5182.dtsi"
16 compatible = "lacie,d2-network", "marvell,orion5x-88f5182", "marvell,orion5x";
25 stdout-path = &uart0;
34 gpio-keys {
[all …]
/linux/drivers/staging/rtl8723bs/include/
H A Dhal_com_reg.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
32 #define REG_GPIO_IO_SEL_2 0x0062 /* RTL8723 WIFI/BT/GPS Multi-Function GPIO Select. */
33 #define REG_MULTI_FUNC_CTRL 0x0068 /* RTL8723 WIFI/BT/GPS Multi-Function control source. */
112 /* Format for offset 540h-542h: */
119 /* |<--Setup--|--Hold------------>| */
120 /* --------------|---------------------- */
124 /* Described by Designer Tim and Bruce, 2011-01-14. */
168 /* By Bruce, 2011-07-18. */
196 #define EFUSE_CTRL REG_EFUSE_CTRL /* E-Fuse Control. */
[all …]
/linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/
H A Dsmu14_driver_if_v14_0.h517 uint8_t SnapToDiscrete; // 0 - Fine grained DPM, 1 - Discrete DPM
520 LinearInt_t ConversionToAvfsClk; // Transfer function to AVFS Clock (GHz->GHz)
1053 …uint32_t Version; // should be unique to each SKU(i.e if any value changes in below structure then…
1064 …owerLimitAc and SocketPowerLimitDc will be interpreted as legacy programs(i.e absolute power). If …
1106 …uint16_t Vmin_Hot_T0[PMFW_VOLT_PLANE_COUNT]; //In mV(Q2) Initial (pre-aging) Vse…
1107 …uint16_t Vmin_Cold_T0[PMFW_VOLT_PLANE_COUNT]; //In mV(Q2) Initial (pre-aging) Vse…
1108 …uint16_t Vmin_Hot_Eol[PMFW_VOLT_PLANE_COUNT]; //In mV(Q2) End-of-life Vset to be …
1109 …uint16_t Vmin_Cold_Eol[PMFW_VOLT_PLANE_COUNT]; //In mV(Q2) End-of-life Vset to be …
1110 uint16_t Vmin_Aging_Offset[PMFW_VOLT_PLANE_COUNT]; //In mV(Q2) Worst-case aging margin
1116 …//Linear offset or GB term to account for mis-correlation between PSM and Vmin shift trends across…
[all …]

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