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/freebsd/sys/contrib/device-tree/Bindings/regulator/
H A Dpwm-regulator.txt7 predefined voltage <=> duty-cycle values must be
10 Intermediary duty-cycle values which would normally
13 the user if the assumptions made in continuous-voltage
18 regulator-{min,max}-microvolt properties to calculate
19 appropriate duty-cycle values. This allows for a much
21 voltage-table mode above. This solution does make an
22 assumption that a %50 duty-cycle value will cause the
27 --------------------
28 - compatible: Should be "pwm-regulator"
30 - pwms: PWM specification (See: ../pwm/pwm.txt)
[all …]
H A Dpwm-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/regulator/pwm-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Brian Norris <briannorris@chromium.org>
11 - Lee Jones <lee@kernel.org>
12 - Alexandre Courbot <acourbot@nvidia.com>
19 duty-cycle values must be provided via DT. Limitations are that the
21 Intermediary duty-cycle values which would normally allow finer grained
23 is given to the user if the assumptions made in continuous-voltage mode do
[all …]
/freebsd/sys/contrib/device-tree/Bindings/input/
H A Dpwm-vibrator.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/input/pwm-vibrator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sebastian Reichel <sre@kernel.org>
14 strength increases based on the duty cycle of the enable PWM channel
15 (100% duty cycle meaning strongest vibration, 0% meaning no vibration).
18 driven at fixed duty cycle. If available this is can be used to increase
23 const: pwm-vibrator
25 pwm-names:
[all …]
H A Dpwm-vibrator.txt4 strength increases based on the duty cycle of the enable PWM channel
5 (100% duty cycle meaning strongest vibration, 0% meaning no vibration).
8 driven at fixed duty cycle. If available this is can be used to increase
12 - compatible: should contain "pwm-vibrator"
13 - pwm-names: Should contain "enable" and optionally "direction"
14 - pwms: Should contain a PWM handle for each entry in pwm-names
17 - vcc-supply: Phandle for the regulator supplying power
18 - direction-duty-cycle-ns: Duty cycle of the direction PWM channel in
26 pinctrl-single,pins = <
32 pinctrl-single,pins = <
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/illumos-gate/usr/src/uts/common/sys/sata/adapters/nv_sata/
H A Dnv_sgpio.h51 /* Command field - write-only */
63 /* Command Status field - read-only */
74 /* Sequence field - read-only */
80 /* SGPIO Status field - read-only */
99 uint64_t sgpio_sr; /* Scratch Register 0-1 */
101 uint32_t sgpio_sr; /* Scratch Register 0-1 */
102 uint32_t sgpio_sr1; /* Scratch Register 0-1 */
119 * Contains read-only configuration fields that are unique to NVIDIA's
161 /* Enable - write-only */
238 #define SGPIO0_TR_DRV_SET(y, a) (((y) & 0xff) << ((3 - (a)) * 8))
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/freebsd/share/man/man9/
H A Dpwmbus.941 .Fn PWMBUS_CHANNEL_CONFIG "device_t bus" "u_int channel" "u_int period" "u_int duty"
47 .Fn PWMBUS_CHANNEL_GET_CONFIG "device_t bus" "u_int channel" "u_int *period" "u_int *duty"
55 The PWMBUS (Pulse-Width Modulation) interface allows a device driver to
63 argument is the duration in nanoseconds of one complete on-off cycle, and the
64 .Va duty
65 argument is the duration in nanoseconds of the on portion of that cycle.
71 In such cases, changing the period or duty cycle of any one channel may affect
76 .Bl -tag -width indent
77 .It Fn PWMBUS_CHANNEL_CONFIG "device_t bus" "u_int channel" "u_int period" "u_int duty"
78 Configure the period and duty (in nanoseconds) in the PWM controller on the bus
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/freebsd/usr.sbin/pwm/
H A Dpwm.838 .Op Fl d Ar duty
62 .Bl -tag -width "-f device"
75 .It Fl d Ar duty
76 Configure the duty cycle (in nanoseconds or percentage) of the PWM channel.
77 Duty is the portion of the
88 .Bl -bullet
91 .Bd -literal
92 pwm -f /dev/pwm/pwmc0.1 -C
95 Configure a 50000 ns period and a 25000 ns duty cycle
97 .Bd -literal
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/freebsd/sys/contrib/device-tree/Bindings/leds/backlight/
H A Dpwm-backlight.txt1 pwm-backlight bindings
4 - compatible: "pwm-backlight"
5 - pwms: OF device-tree PWM specification (see PWM binding[0])
6 - power-supply: regulator for supply voltage
9 - pwm-names: a list of names for the PWM devices specified in the
11 - enable-gpios: contains a single GPIO specifier for the GPIO which enables
13 - post-pwm-on-delay-ms: Delay in ms between setting an initial (non-zero) PWM
15 - pwm-off-delay-ms: Delay in ms between disabling the backlight using GPIO
17 - brightness-levels: Array of distinct brightness levels. Typically these
19 0 will do. The actual brightness level (PWM duty cycle)
[all …]
H A Dpwm-backlight.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/leds/backlight/pwm-backlight.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: pwm-backligh
[all...]
/freebsd/sys/dev/pwm/
H A Dpwmbus_if.m1 #-
2 # SPDX-License-Identifier: BSD-2-Clause
51 # Config the period (Total number of cycle in ns) and
52 # the duty (active number of cycle in ns)
58 u_int duty;
62 # Get the period (Total number of cycle in ns) and
63 # the duty (active number of cycle in ns)
69 u_int *duty;
H A Dpwm_backlight.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
71 uint64_t duty; member
78 { "pwm-backlight", 1 },
86 if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data) in pwm_backlight_probe()
103 rv = pwm_get_by_ofw_propidx(dev, node, "pwms", 0, &sc->channel); in pwm_backlight_attach()
109 if (regulator_get_by_ofw_property(dev, 0, "power-supply", in pwm_backlight_attach()
110 &sc->power_supply) != 0) { in pwm_backlight_attach()
111 device_printf(dev, "No power-supply property\n"); in pwm_backlight_attach()
115 if (OF_hasprop(node, "brightness-levels")) { in pwm_backlight_attach()
[all …]
/illumos-gate/usr/src/uts/common/disp/
H A Dsysdc.c27 * The System Duty Cycle (SDC) scheduling class
28 * --------------------------------------------
38 * without preemption from anything other than real-time and interrupt
44 * kernel to perform significant amounts of CPU-intensive work. One
50 * on a compression-heavy dataset can keep them busy for seconds on end.
51 * This causes human-time-scale dispatch latency bubbles for any other
59 * SDC is centered around the concept of a thread's duty cycle (DC):
62 * Duty Cycle = ----------------------
72 * microstate data to compute the actual duty cycle that that thread
83 * If a thread is running when sysdc_update() calculates its actual duty
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/freebsd/sys/contrib/device-tree/Bindings/hwmon/
H A Dadt7475.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jean Delvare <jdelvare@suse.com>
23 https://www.onsemi.com/pub/Collateral/ADT7473-D.PDF
24 https://www.onsemi.com/pub/Collateral/ADT7475-D.PDF
25 https://www.onsemi.com/pub/Collateral/ADT7476-D.PDF
26 https://www.onsemi.com/pub/Collateral/ADT7490-D.PDF
34 - adi,adt7473
35 - adi,adt7475
[all …]
/freebsd/sys/contrib/device-tree/Bindings/leds/irled/
H A Dspi-ir-led.txt8 - compatible: should be "ir-spi-led".
11 - duty-cycle: 8 bit value that represents the percentage of one period
13 - led-active-low: boolean value that specifies whether the output is
15 - power-supply: specifies the power source. It can either be a regulator
16 or a gpio which enables a regulator, i.e. a regulator-fixed as
18 Documentation/devicetree/bindings/regulator/fixed-regulator.yaml
23 compatible = "ir-spi-led";
25 spi-max-frequency = <5000000>;
26 power-supply = <&vdd_led>;
27 led-active-low;
[all …]
H A Dir-spi-led.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/leds/irled/ir-spi-led.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sean Young <sean@mess.org>
17 - $ref: /schemas/spi/spi-peripheral-props.yaml#
21 const: ir-spi-led
26 duty-cycle:
32 led-active-low:
37 power-supply: true
[all …]
/freebsd/share/man/man4/
H A Dpwmc.435 .Bd -ragged -offset indent
43 .Bd -literal -offset indent
49 driver provides device-control access to a channel of PWM hardware.
59 duty cycle of any one channel may affect other channels within the
84 .Bl -tag -width indent
99 .Bd -literal
102 u_int duty;
107 .Bl -tag -width period
109 The duration, in nanoseconds, of one complete on-off cycle.
110 .It Va duty
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/allwinner/
H A Dsun50i-a64-pinephone-1.1.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 /dts-v1/;
6 #include "sun50i-a64-pinephone.dtsi"
10 compatible = "pine64,pinephone-1.1", "pine64,pinephone", "allwinner,sun50i-a64";
14 power-supply = <&reg_ldo_io0>;
17 * 1.0, and the lowest PWM duty cycle that doesn't lead to backlight
18 * being off is around 20%. Duty cycle for the lowest brightness level
22 brightness-levels = <
28 num-interpolated-steps = <50>;
29 default-brightness-level = <400>;
[all …]
H A Dsun50i-a64-pinephone-1.2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 /dts-v1/;
6 #include "sun50i-a64-pinephone.dtsi"
10 compatible = "pine64,pinephone-1.2", "pine64,pinephone", "allwinner,sun50i-a64";
12 wifi_pwrseq: wifi-pwrseq {
13 compatible = "mmc-pwrseq-simple";
14 reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
19 power-supply = <&reg_ldo_io0>;
22 * and the lowest PWM duty cycle that doesn't lead to backlight being off
23 * is around 10%. Duty cycle for the lowest brightness level also varries
[all …]
/freebsd/sys/dev/videomode/
H A Dvesagtf.c3 /*-
43 * This has required the use of 64-bit integers in a few places, but
89 * Copyright (c) 1994, 1995, 1996 - Video Electronics Standards
120 * surrounding the addressable video); on most non-overscan type
170 /* C' and M' are part of the Blanking Duty Cycle computation */
172 * #define C_PRIME (((C - J) * K/256.0) + J)
180 #define C_PRIME256(p) (((p->C - p->J) * p->K) + (p->J * 256))
181 #define M_PRIME256(p) (p->K * p->M)
186 * print_value() - print the result of the named computation; this is
195 printf("%2d: %-27s: %u\n", n, name, val); in print_value()
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/illumos-gate/usr/src/uts/common/sys/
H A Dsysdc_impl.h43 * Tracks per-processor-set information for SDC. Its main use is to
44 * implement per-processor-set breaks.
64 * Per-thread information, pointed to by t_cldata.
67 uint_t sdc_target_DC; /* target duty cycle */
74 struct _kthread *sdc_thread; /* back-pointer, or NULL if freeable */
82 hrtime_t sdc_base_O; /* on-cpu time at last reset */
96 hrtime_t sdc_cur_O; /* on-cpu time at last prio check */
99 uint_t sdc_cur_DC; /* our actual duty cycle at last chk */
108 char sdl_pad[64 - sizeof (kmutex_t) - sizeof (sysdc_t *)];
121 * Duty cycles are percentages in the range [1,100].
/freebsd/sys/contrib/device-tree/Bindings/pwm/
H A Dmicrochip,corepwm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Conor Dooley <conor.dooley@microchip.com>
16 https://www.microsemi.com/existing-parts/parts/152118
19 - $ref: pwm.yaml#
24 - const: microchip,corepwm-rtl-v4
32 "#pwm-cells":
37 microchip,sync-update-mask:
45 control the duty cycle for channel x have a second "shadow"/buffer reg synthesised.
[all …]
/freebsd/sys/dev/acpica/
H A Dacpi_throttle.c1 /*-
2 * Copyright (c) 2003-2005 Nate Lawson (SDG)
50 * clock cycle. It does not change voltage and so is less efficient than
90 static int thr_rid; /* Driver-wide resource id. */
137 /* Check for a valid duty width and parent CPU type. */ in acpi_throttle_identify()
146 * Add a child if there's a non-NULL P_BLK and correct length, or in acpi_throttle_identify()
154 if ((obj->Processor.PblkAddress && obj->Processor.PblkLength >= 4) || in acpi_throttle_identify()
172 * the chipset modulating the STPCLK# pin based on the duty cycle. in acpi_throttle_probe()
195 sc->cpu_dev = dev; in acpi_throttle_attach()
196 sc->cpu_handle = acpi_get_handle(dev); in acpi_throttle_attach()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dpinctrl-mt6797.txt6 - compatible: Value should be one of the following.
7 "mediatek,mt6797-pinctrl", compatible with mt6797 pinctrl.
8 - reg: Should contain address and size for gpio, iocfgl, iocfgb,
10 - reg-names: An array of strings describing the "reg" entries. Must
12 - gpio-controller: Marks the device node as a gpio controller.
13 - #gpio-cells: Should be two. The first cell is the gpio pin number
17 - interrupt-controller: Marks the device node as an interrupt controller.
18 - #interrupt-cells: Should be two.
19 - interrupts : The interrupt outputs from the controller.
21 Please refer to pinctrl-bindings.txt in this directory for details of the
[all …]
H A Dmediatek,mt6797-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt6797-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sean Wang <sean.wang@kernel.org>
17 const: mediatek,mt6797-pinctrl
23 reg-names:
25 - const: gpio
26 - const: iocfgl
27 - const: iocfgb
[all …]
/illumos-gate/usr/src/cmd/priocntl/
H A Dsdcpriocntl.c38 "usage: priocntl -l\n\
39 priocntl -d [-i idtype] [idlist]\n";
42 * A whole lot of to-do for a scheduling class that can't actually be
57 while ((c = getopt(argc, argv, "c:dei:ls")) != -1) { in main()
63 "%s is actually sub-command for %s class\n", in main()
101 "priocntl: \"-%c\" may not be used with the %s class\n", in main()
114 * No scheduling-class-specific information to print, in main()
124 (void) printf("SYSTEM DUTY-CYCLE PROCESSES:\n"); in main()
132 (void) printf("SDC (System Duty-Cycle Class)\n"); in main()

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