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/linux/Documentation/userspace-api/media/v4l/
H A Dext-ctrls-fm-rx.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
4 .. _fm-rx-controls:
14 .. _fm-rx-control-id:
28 Gets RDS Programme Type field. This encodes up to 31 pre-defined
46 wishes to transmit longer PS names, programme-related information or
69 Configures the de-emphasis value for reception. A de-emphasis filter
73 values for de-emphasis. They are:
75 .. flat-table::
76 :header-rows: 0
77 :stub-columns: 0
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/linux/Documentation/devicetree/bindings/phy/
H A Dfsl,imx8-pcie-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/fsl,imx8-pcie-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Richard Zhu <hongxing.zhu@nxp.com>
13 "#phy-cells":
18 - fsl,imx8mm-pcie-phy
19 - fsl,imx8mp-pcie-phy
27 clock-names:
29 - const: ref
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H A Dfsl,imx8mq-usb-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/fsl,imx8mq-usb-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Li Jun <jun.li@nxp.com>
15 - enum:
16 - fsl,imx8mq-usb-phy
17 - fsl,imx8mp-usb-phy
18 - items:
19 - const: fsl,imx95-usb-phy
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/linux/Documentation/devicetree/bindings/usb/
H A Dsnps,dwc3-common.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/snps,dwc3-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Felipe Balbi <balbi@kernel.org>
14 vendor-specific implementation or as a standalone component.
17 - $ref: usb-drd.yaml#
18 - if:
24 - dr_mode
28 $ref: usb-xhci.yaml#
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/linux/sound/soc/codecs/
H A Dak4619.c1 // SPDX-License-Identifier: GPL-2.0
3 * ak4619.c -- Asahi Kasei ALSA SoC Audio driver
47 #define DAC_DEMP 0x13 /* DAC De-Emphasis Setting */
126 /* DAC De-Emphasi
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H A Dad1836.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright 2009-2011 Analog Devices Inc.
38 * AD1836 volume/mute/de-emphasis etc. controls
99 /* ADC high-pas
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H A Dak4458.c1 // SPDX-License-Identifier: GPL-2.0
20 #include <sound/soc-dapm.h>
84 * from -127 to 0 dB in 0.5 dB steps (mute instead of -127.5 dB)
86 static DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
101 * 0, 0, 0 : Sharp Roll-Off Filter
102 * 0, 0, 1 : Slow Roll-Off Filter
103 * 0, 1, 0 : Short delay Sharp Roll-Off Filter
104 * 0, 1, 1 : Short delay Slow Roll-Off Filter
105 * 1, *, * : Super Slow Roll-Off Filter
108 "Sharp Roll-Off Filter",
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H A Dad193x.c1 // SPDX-License-Identifier: GPL-2.0-or-later
30 * AD193X volume/mute/de-emphasis etc. controls
37 static const DECLARE_TLV_DB_MINMAX(adau193x_tlv, -9563, 0);
67 /* DAC de
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H A Dcs4271.c1 // SPDX-License-Identifier: GPL-2.0-or-later
9 * The data format accepted is I2S or left-justified.
131 * Default CS4271 power-up configuration
132 * Array contains non-existing in hw register at address 0
160 /* Current sample rate for de-emphasi
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H A Dcs4349.h1 /* SPDX-License-Identifier: GPL-2.0-only */
42 /* (Digital Interface Format, De-Emphasis Control, Functional Mode */
H A Dssm2602.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
81 #define APDIGI_DE_EMPHASIS 0x006 /* De-Emphasis Control …
107 #define SRATE_BOS_RATE 0x002 /* Base Over-Sampling rate …
H A Dcs42xx8.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * cs42xx8.h - Cirrus Logic CS42448/CS42888 Audio CODEC driver header file
55 #define CS42XX8_NUMREGS (CS42XX8_LASTREG - CS42XX8_FIRSTREG + 1)
91 #define CS42XX8_FUNCMOD_DAC_FM_MASK (((1 << CS42XX8_FUNCMOD_DAC_FM_WIDTH) - 1) << CS42XX8_FUNCMOD_DAC_FM_SHIFT)
95 #define CS42XX8_FUNCMOD_ADC_FM_MASK (((1 << CS42XX8_FUNCMOD_ADC_FM_WIDTH) - 1) << CS42XX8_FUNCMOD_ADC_FM_SHIFT)
101 #define CS42XX8_FUNCMOD_MFREQ_MASK (((1 << CS42XX8_FUNCMOD_MFREQ_WIDTH) - 1) << CS42XX8_FUNCMOD_MFREQ_SHIFT)
122 #define CS42XX8_INTF_DAC_DIF_MASK (((1 << CS42XX8_INTF_DAC_DIF_WIDTH) - 1) << CS42XX8_INTF_DAC_DIF_SHIFT)
132 #define CS42XX8_INTF_ADC_DIF_MASK (((1 << CS42XX8_INTF_ADC_DIF_WIDTH) -
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H A Dcs4349.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * cs4349.c -- CS4349 ALSA Soc Audio driver
25 #include <sound/soc-dapm.h>
32 { 2, 0x00 }, /* r02 - Mode Control */
33 { 3, 0x09 }, /* r03 - Volume, Mixing and Inversion Control */
34 { 4, 0x81 }, /* r04 - Mute Control */
35 { 5, 0x00 }, /* r05 - Channel A Volume Control */
36 { 6, 0x00 }, /* r06 - Channel B Volume Control */
37 { 7, 0xB1 }, /* r07 - Ramp and Filter Control */
38 { 8, 0x1C }, /* r08 - Misc. Control */
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H A Dcs4234.c1 // SPDX-License-Identifier: GPL-2.0-only
2 // cs4234.c -- ALSA SoC CS4234 driver
43 /* -89.92dB to +6.02dB with step of 0.38dB */
44 static const DECLARE_TLV_DB_SCALE(dac_tlv, -8992, 38, 0);
95 regmap_read(cs4234->regmap, CS4234_ADC_CTRL2, &val); in cs4234_dac14_grp_delay_put()
97 ret = -EBUSY; in cs4234_dac14_grp_delay_put()
98 dev_err(component->dev, "Can't change group delay while ADC are ON\n"); in cs4234_dac14_grp_delay_put()
102 regmap_read(cs4234->regmap, CS4234_DAC_CTRL4, &val); in cs4234_dac14_grp_delay_put()
104 ret = -EBUSY; in cs4234_dac14_grp_delay_put()
105 dev_err(component->dev, "Can't change group delay while DAC are ON\n"); in cs4234_dac14_grp_delay_put()
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H A Dtas5086.c1 // SPDX-License-Identifier: GPL-2.0-or-later
8 * - implement DAPM and input muxing
9 * - implement modulation limit
10 * - implement non-default PWM start
13 * because the registers are of unequal size, and multi-byt
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/linux/Documentation/devicetree/bindings/sound/
H A Duda1334.txt7 - compatible : "nxp,uda1334"
8 - nxp,mute-gpios: a GPIO spec for the MUTE pin.
9 - nxp,deemph-gpios: a GPIO spec for the De-emphasis pin
13 uda1334: audio-codec {
15 nxp,mute-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
16 nxp,deemph-gpios = <&gpio3 3 GPIO_ACTIVE_LOW>;
/linux/Documentation/devicetree/bindings/scsi/
H A Dhisilicon-sas.txt6 - compatible : value should be as follows:
7 (a) "hisilicon,hip05-sas-v1" for v1 hw in hip05 chipset
8 (b) "hisilicon,hip06-sas-v2" for v2 hw in hip06 chipset
9 (c) "hisilicon,hip07-sas-v2" for v2 hw in hip07 chipset
10 - sas-addr : array of 8 bytes for host SAS address
11 - reg : Contains two regions. The first is the address and length of the SAS
15 - hisilicon,sas-syscon: phandle of syscon used for sas control
16 - ctrl-reset-reg : offset to controller reset register in ctrl reg
17 - ctrl-reset-sts-reg : offset to controller reset status register in ctrl reg
18 - ctrl-clock-ena-reg : offset to controller clock enable register in ctrl reg
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/linux/drivers/media/radio/si470x/
H A Dradio-si470x-common.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * drivers/media/radio/si470x/radio-si470x-common.c
8 * Copyright (c) 2012 Hans de Goede <hdegoede@redhat.com>
14 * 2008-01-12 Tobias Lorenz <tobias.lorenz@gmx.net>
16 * - First working version
17 * 2008-01-13 Tobias Lorenz <tobias.lorenz@gmx.net>
19 * - Improved error handling, every function now returns errno
20 * - Improved multi user access (start/mute/stop)
21 * - Channel doesn't get lost anymore after start/mute/stop
22 * - RDS support added (polling mode via interrupt EP 1)
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H A Dradio-si470x.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * drivers/media/radio/si470x/radio-si470x.h
12 #define DRIVER_NAME "radio-si470x"
24 #include <media/v4l2-common.h>
25 #include <media/v4l2-ioctl.h>
26 #include <media/v4l2-ctrls.h>
27 #include <media/v4l2-event.h>
28 #include <media/v4l2-device.h>
68 #define SYSCONFIG1_DE 0x0800 /* bits 11..11: De-emphasis (0=75us 1=50us) */
90 #define TEST1_AHIZEN 0x4000 /* bits 14..14: Audio High-Z Enable */
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/linux/sound/i2c/other/
H A Dak4xxx-adda.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright (c) 2000-2004 Jaroslav Kysela <perex@perex.cz>,
7 * Takashi Iwai <tiwai@suse.de>
18 #include <sound/ak4xxx-adda.h>
21 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>, Takashi Iwai <tiwai@suse.de>");
29 ak->op in snd_akm4xxx_write()
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/linux/drivers/phy/lantiq/
H A Dphy-lantiq-rcu-usb2.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (C) 2017 Hauke Mehrtens <hauke@hauke-m.de>
21 /* Transmitter HS Pre-Emphasis Enable */
69 .compatible = "lantiq,ase-usb2-phy",
73 .compatible = "lantiq,danube-usb2-phy",
77 .compatible = "lantiq,xrx100-usb2-phy",
81 .compatible = "lantiq,xrx200-usb2-phy",
85 .compatible = "lantiq,xrx300-usb2-phy",
96 if (priv->reg_bits->have_ana_cfg) { in ltq_rcu_usb2_phy_init()
97 regmap_update_bits(priv->regmap, priv->ana_cfg1_reg_offset, in ltq_rcu_usb2_phy_init()
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/linux/drivers/phy/qualcomm/
H A Dphy-qcom-pcie2.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2014-2017, The Linux Foundation. All rights reserved.
7 #include <linux/clk-provider.h>
16 #include <dt-bindings/phy/phy.h>
55 ret = reset_control_deassert(qphy->phy_reset); in qcom_pcie2_phy_init()
57 dev_err(qphy->dev, "cannot deassert pipe reset\n"); in qcom_pcie2_phy_init()
61 ret = regulator_bulk_enable(ARRAY_SIZE(qphy->vregs), qphy->vregs); in qcom_pcie2_phy_init()
63 reset_control_assert(qphy->phy_reset); in qcom_pcie2_phy_init()
75 val = readl(qphy->base + PCIE20_PARF_PHY_REFCLK_CTRL2); in qcom_pcie2_phy_power_on()
77 writel(val, qphy->base + PCIE20_PARF_PHY_REFCLK_CTRL2); in qcom_pcie2_phy_power_on()
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H A Dphy-qcom-snps-femto-v2.c1 // SPDX-License-Identifier: GPL-2.0
82 "vdda-pll", "vdda33", "vdda18",
110 * struct qcom_snps_hsphy - snps hs phy attributes
143 struct device *dev = hsphy->dev; in qcom_snps_hsphy_clk_init()
145 hsphy->num_clks = 2; in qcom_snps_hsphy_clk_init()
146 hsphy->clks = devm_kcalloc(dev, hsphy->num_clks, sizeof(*hsphy->clks), GFP_KERNEL); in qcom_snps_hsphy_clk_init()
147 if (!hsphy->clks) in qcom_snps_hsphy_clk_init()
148 return -ENOMEM; in qcom_snps_hsphy_clk_init()
154 hsphy->clks[0].id = "cfg_ahb"; in qcom_snps_hsphy_clk_init()
155 hsphy->clks[0].clk = devm_clk_get_optional(dev, "cfg_ahb"); in qcom_snps_hsphy_clk_init()
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/linux/drivers/phy/freescale/
H A Dphy-fsl-imx8m-pcie.c1 // SPDX-License-Identifier: GPL-2.0+
12 #include <linux/mfd/syscon/imx7-iomuxc-gpr.h>
20 #include <dt-bindings/phy/phy-imx8-pcie.h>
79 pad_mode = imx8_phy->refclk_pad_mode; in imx8_pcie_phy_power_on()
80 switch (imx8_phy->drvdata->variant) { in imx8_pcie_phy_power_on()
82 reset_control_assert(imx8_phy->reset); in imx8_pcie_phy_power_on()
84 /* Tune PHY de-emphasis setting to pass PCIe compliance. */ in imx8_pcie_phy_power_on()
85 if (imx8_phy->tx_deemph_gen1) in imx8_pcie_phy_power_on()
86 writel(imx8_phy->tx_deemph_gen1, in imx8_pcie_phy_power_on()
87 imx8_phy->base + PCIE_PHY_TRSV_REG5); in imx8_pcie_phy_power_on()
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/linux/drivers/block/drbd/
H A Ddrbd_protocol.h1 /* SPDX-License-Identifier: GPL-2.0-only */
33 P_SUPERSEDED = 0x18, /* Used in proto C, two-primaries conflict detection */
74 P_ZEROES = 0x36, /* data sock: zero-out, WRITE_ZEROES */
154 u32 size; /* == bio->bi_size */
159 u32 size; /* == bio->bi_size */
166 * P_SUPERSEDED (proto C, two-primaries conflict detection)
196 /* Detect all-zeros during resync, and rather TRIM/UNMAP/DISCARD those blocks
203 * - indicates support for 128 MiB "batch bios",
206 * - indicates that we exchange additional settings in p_sizes
215 * back to zero-out.
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