/linux/drivers/mtd/nand/spi/ |
H A D | winbond.c | 295 if (op->cmd.dtr || op->addr.dtr || op->dummy.dtr || op->data.dtr) in w25n0xjw_hs_cfg() 354 bool dtr, single; in w35n0xjw_vcr_cfg() local 361 dtr = (op->cmd.dtr || op->addr.dtr || op->data.dtr); in w35n0xjw_vcr_cfg() 362 if (single && !dtr) in w35n0xjw_vcr_cfg() 364 else if (!single && !dtr) in w35n0xjw_vcr_cfg() 366 else if (!single && dtr) in w35n0xjw_vcr_cfg() 375 dummy_cycles = ((op->dummy.nbytes * 8) / op->dummy.buswidth) / (op->dummy.dtr ? 2 : 1); in w35n0xjw_vcr_cfg()
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/linux/drivers/rtc/ |
H A D | rtc-isl1208.c | 238 int dtr = i2c_smbus_read_byte_data(client, ISL1208_REG_DTR); in isl1208_i2c_get_dtr() local 239 if (dtr < 0) in isl1208_i2c_get_dtr() 242 /* dtr encodes adjustments of {-60,-40,-20,0,20,40,60} ppm */ in isl1208_i2c_get_dtr() 243 dtr = ((dtr & 0x3) * 20) * (dtr & (1 << 2) ? -1 : 1); in isl1208_i2c_get_dtr() 245 return dtr + 100; in isl1208_i2c_get_dtr() 302 int sr, dtr, atr, usr; in isl1208_rtc_proc() local 321 dtr = isl1208_i2c_get_dtr(client); in isl1208_rtc_proc() 322 if (dtr >= 0) in isl1208_rtc_proc() 323 seq_printf(seq, "digital_trim\t: %d ppm\n", dtr - 100); in isl1208_rtc_proc() 721 int dtr = isl1208_i2c_get_dtr(to_i2c_client(dev->parent)); in isl1208_sysfs_show_dtrim() local [all …]
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H A D | rtc-x1205.c | 295 unsigned char dtr; in x1205_get_dtrim() local 304 { /* read dtr */ in x1205_get_dtrim() 308 .buf = &dtr in x1205_get_dtrim() 312 /* read dtr register */ in x1205_get_dtrim() 318 dev_dbg(&client->dev, "%s: raw dtr=%x\n", __func__, dtr); in x1205_get_dtrim() 322 if (dtr & X1205_DTR_DTR0) in x1205_get_dtrim() 325 if (dtr & X1205_DTR_DTR1) in x1205_get_dtrim() 328 if (dtr & X1205_DTR_DTR2) in x1205_get_dtrim()
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/linux/drivers/usb/serial/ |
H A D | belkin_sa.c | 308 /* reassert DTR and (maybe) RTS on transition from B0 */ in belkin_sa_set_termios() 312 dev_err(&port->dev, "Set DTR error\n"); in belkin_sa_set_termios() 339 /* Drop RTS and DTR */ in belkin_sa_set_termios() 342 dev_err(&port->dev, "DTR LOW error\n"); in belkin_sa_set_termios() 440 int dtr = 0; in belkin_sa_tiocmset() local 451 dtr = 1; in belkin_sa_tiocmset() 459 dtr = 0; in belkin_sa_tiocmset() 471 retval = BSA_USB_CMD(BELKIN_SA_SET_DTR_REQUEST, dtr); in belkin_sa_tiocmset() 473 dev_err(&port->dev, "Set DTR error %d\n", retval); in belkin_sa_tiocmset()
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H A D | kobil_sct.c | 256 /* FIXME: Add rts/dtr methods */ in kobil_close() 422 int dtr = 0; in kobil_tiocmset() local 436 dtr = 1; in kobil_tiocmset() 440 dtr = 0; in kobil_tiocmset() 443 if (dtr != 0) in kobil_tiocmset() 444 dev_dbg(dev, "%s - Setting DTR\n", __func__); in kobil_tiocmset() 446 dev_dbg(dev, "%s - Clearing DTR\n", __func__); in kobil_tiocmset() 451 ((dtr != 0) ? SUSBCR_SSL_SETDTR : SUSBCR_SSL_CLRDTR), in kobil_tiocmset()
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H A D | ftdi_sio.h | 92 * Clear DTR 230 * Also - you can not set DTR and RTS with one control message 242 * B0 DTR state 249 * B8 DTR state enable 251 * 1 = use DTR state 277 * B1 Output handshaking using DTR/DSR
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H A D | upd78f0730.c | 18 * - signals: DTR, RTS and BREAK 42 * state of control signals (DTR, RTS and BREAK). 218 dev_dbg(dev, "%s - set DTR\n", __func__); in upd78f0730_tiocmset() 226 dev_dbg(dev, "%s - clear DTR\n", __func__); in upd78f0730_tiocmset()
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H A D | mct_u232.h | 112 #define MCT_U232_MCR_NONE 0x8 /* Deactivate DTR and RTS */ 114 #define MCT_U232_MCR_DTR 0x9 /* Activate DTR */ 243 * modem control inputs. CTS is connected to RTS, DTR is connected to 253 * Bit 0: Data Terminal Ready (DTR). When set to "1", the output of the UART 254 * -DTR line is Low (Active). 366 * apart from DTR/RTS settings. Both signals are dropped for no flow control
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H A D | whiteheat.h | 25 #define WHITEHEAT_SET_DTR 5 /* turn DTR on or off */ 30 #define WHITEHEAT_GET_DTR_RTS 10 /* get the state of DTR and RTS 79 #define WHITEHEAT_HFLOW_DTR 0x02 /* DTR is off/on when RX
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/linux/arch/m68k/include/asm/ |
H A D | nettel.h | 30 * NETtel/5307 based hardware first. DTR/DCD lines are wired to 47 * PPIO bits used for DTR/DCD. 76 * NETtel/5272 based hardware. DTR/DCD lines are wired to GPB lines. 81 #define MCFPP_DTR1 0x0000 /* Port 1 no DTR support */ 86 * PPIO bits used for DTR/DCD.
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/linux/arch/arm/boot/dts/ti/omap/ |
H A D | am335x-netcom-plus-2xx.dts | 27 AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* DTR */ 40 AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* DTR */ 60 dtr-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>; 71 dtr-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
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H A D | am335x-baltos-ir3220.dts | 33 …XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* lcd_vsync.gpio2[22] DTR */ 46 …XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad12.gpio1[12] DTR */ 65 dtr-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>; 76 dtr-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
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H A D | am335x-baltos-ir5221.dts | 41 …XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* lcd_vsync.gpio2[22] DTR */ 54 …XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad12.gpio1[12] DTR */ 73 dtr-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>; 84 dtr-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
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H A D | am335x-baltos-ir2110.dts | 27 …XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* lcd_vsync.gpio2[22] DTR */ 44 dtr-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;
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/linux/drivers/tty/hvc/ |
H A D | hvsi_lib.c | 289 int hvsilib_write_mctrl(struct hvsi_priv *pv, int dtr) in hvsilib_write_mctrl() argument 295 if (dtr) in hvsilib_write_mctrl() 303 pr_devel("HVSI@%x: %s DTR...\n", pv->termno, in hvsilib_write_mctrl() 304 dtr ? "Setting" : "Clearing"); in hvsilib_write_mctrl() 310 ctrl.word = cpu_to_be32(dtr ? HVSI_TSDTR : 0); in hvsilib_write_mctrl() 365 /* Set our own DTR */ in hvsilib_establish() 403 /* Clear our own DTR */ in hvsilib_close()
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/linux/drivers/spi/ |
H A D | spi-cadence-quadspi.c | 411 if (op->cmd.dtr) in cqspi_calc_dummy() 511 if (op->cmd.dtr) { in cqspi_enable_dtr() 521 /* Shortcut if DTR is already disabled. */ in cqspi_enable_dtr() 557 if (op->cmd.dtr) in cqspi_command_read() 642 if (op->cmd.dtr) in cqspi_command_write() 698 if (op->cmd.dtr) in cqspi_read_setup() 1028 if (op->cmd.dtr) in cqspi_write_setup() 1045 * command in DTR mode. in cqspi_write_setup() 1338 * address (all 0s) with the read status register command in DTR mode. in cqspi_write() 1340 * the flash when it is polling the write completion register in DTR in cqspi_write() [all …]
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H A D | spi-mem.c | 169 op->cmd.dtr || op->addr.dtr || op->dummy.dtr || op->data.dtr; in spi_mem_default_supports_op() 172 if (!spi_mem_controller_is_capable(ctlr, dtr)) in spi_mem_default_supports_op() 388 op->cmd.buswidth, op->cmd.dtr ? 'D' : 'S', in spi_mem_exec_op() 389 op->addr.buswidth, op->addr.dtr ? 'D' : 'S', in spi_mem_exec_op() 390 op->dummy.buswidth, op->dummy.dtr ? 'D' : 'S', in spi_mem_exec_op() 391 op->data.buswidth, op->data.dtr ? 'D' : 'S', in spi_mem_exec_op() 588 * modes, sometimes in DTR. All these combinations make it impossible to 613 ncycles += ((op->cmd.nbytes * 8) / op->cmd.buswidth) / (op->cmd.dtr ? 2 : 1); in spi_mem_calc_op_duration() 614 ncycles += ((op->addr.nbytes * 8) / op->addr.buswidth) / (op->addr.dtr ? 2 : 1); in spi_mem_calc_op_duration() 618 ncycles += ((op->dummy.nbytes * 8) / op->dummy.buswidth) / (op->dummy.dtr ? 2 : 1); in spi_mem_calc_op_duration() [all …]
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/linux/Documentation/devicetree/bindings/net/ |
H A D | intel,ixp4xx-hss.yaml | 98 dtr-gpios: 100 description: Data Terminal Ready (DTR) GPIO line 120 - dtr-gpios
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/linux/arch/sh/include/mach-common/mach/ |
H A D | secureedge5410.h | 30 * D7 - DTR on ttySC1 32 * D9 - ttySC0 DTR (7100)
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/linux/arch/x86/boot/compressed/ |
H A D | idt_64.c | 25 static void load_boot_idt(const struct desc_ptr *dtr) in load_boot_idt() argument 27 asm volatile("lidt %0"::"m" (*dtr)); in load_boot_idt()
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/linux/drivers/net/hamradio/ |
H A D | z8530.h | 98 #define DTR 0x80 /* DTR */ macro 152 #define DTRREQ 4 /* DTR/Request function */ 231 #define FASTDTR 0x10 /* Fast DTR/REQ Mode */
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/linux/Documentation/devicetree/bindings/serial/ |
H A D | serial.yaml | 46 dtr-gpios: 50 the UART's DTR line.
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/linux/drivers/tty/serial/ |
H A D | sunzilog.h | 126 #define DTR 0x80 /* DTR */ macro 137 #define nDTRnREQ 0x10 /* /DTR/REQ timing */ 190 #define DTRREQ 4 /* DTR/Request function */
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H A D | dz.h | 52 #define DZ_MODEM_DTR 0x0400 /* DTR for the modem line (2) */ 54 #define DZ_PRINT_DTR 0x0100 /* DTR for the prntr line (3) */
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/linux/drivers/md/ |
H A D | dm-snap-transient.c | 114 .dtr = transient_dtr, 126 .dtr = transient_dtr,
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