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/freebsd/sys/contrib/device-tree/Bindings/display/bridge/
H A Dti,sn65dsi83.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SN65DSI83 and SN65DSI84 DSI to LVDS bridge chip
10 - Marek Vasut <marex@denx.de>
13 Texas Instruments SN65DSI83 1x Single-link MIPI DSI
14 to 1x Single-link LVDS
16 Texas Instruments SN65DSI84 1x Single-link MIPI DSI
17 to 1x Dual-link or 2x Single-link LVDS
23 - ti,sn65dsi83
[all …]
H A Dadi,adv7511.txt2 ------------------------------------------------
6 conversion, S/PDIF, CEC and HDCP. ADV7533/5 supports the DSI interface for input
11 - compatible: Should be one of:
18 - reg: I2C slave addresses
22 address is mandatory, others are optional and revert to defaults if not
29 properties describe the input and map directly to the video input tables of the
32 - adi,input-depth: Number of bits per color component at the input (8, 10 or
34 - adi,input-colorspace: The input color space, one of "rgb", "yuv422" or
36 - adi,input-clock: The input clock type, one of "1x" (one clock cycle per
37 pixel), "2x" (two clock cycles per pixel), "ddr" (one clock cycle per pixel,
[all …]
H A Dps8640.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MIPI DSI to eDP Video Format Converter
10 - Nicolas Boichat <drinkcat@chromium.org>
13 The PS8640 is a low power MIPI-to-eDP video format converter supporting
14 mobile devices with embedded panel resolutions up to 2048 x 1536. The
15 device accepts a single channel of MIPI DSI v1.1, with up to four lanes
16 plus clock, at a transmission rate up to 1.5Gbit/sec per lane. The
17 device outputs eDP v1.4, one or two lanes, at a link rate of up to
[all …]
/freebsd/sys/contrib/device-tree/Bindings/display/mediatek/
H A Dmediatek,dsi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/mediatek/mediatek,dsi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek DSI Controller
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
12 - Jitao Shi <jitao.shi@mediatek.com>
15 The MediaTek DSI function block is a sink of the display subsystem and can
16 drive up to 4-lane MIPI DSI output. Two DSIs can be synchronized for dual-
[all …]
/freebsd/sys/dev/drm2/
H A Ddrm_os_freebsd.c40 return ((int64_t)tv->tv_sec * NSEC_PER_SEC) + in timeval_to_ns()
41 tv->tv_usec * NSEC_PER_USEC; in timeval_to_ns()
59 tv.tv_sec--; in ns_to_timeval()
74 * Compute an internal HZ value which can divide 2**32 to in drm_linux_timer_init()
81 drm_linux_timer_hz_mask--; in drm_linux_timer_init()
116 return (-ENXIO); in drm_probe_helper()
122 device_get_nameunit(kdev), id_entry->name); in drm_probe_helper()
123 device_set_desc(kdev, id_entry->name); in drm_probe_helper()
128 return (-BUS_PROBE_GENERIC); in drm_probe_helper()
131 return (-ENXIO); in drm_probe_helper()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/display/panel/
H A Dboe,bf060y8m-aj0.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/boe,bf060y8m-aj0.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: BOE BF060Y8M-AJ0 5.99" 1080x2160 AMOLED Panel
10 - AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
14 video mode panel module on MIPI-DSI 4-Lane interface, GGRB
16 area of 68.04 x 136.08 millimeters.
23 - $ref: panel-common.yaml#
27 const: boe,bf060y8m-aj0
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8mp-tx8p-ml81-moduline-display-106-av123z7m-n17.dtso1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 #include <dt-bindings/gpio/gpio.h>
9 #include "imx8mp-pinfunc.h"
11 /dts-v1/;
15 model = "GOcontroll Moduline Display with BOE av123z7m-n17 display";
18 compatible = "boe,av123z7m-n17";
19 enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
20 pinctrl-0 = <&pinctrl_panel>;
21 pinctrl-names = "default";
22 power-supply = <&reg_3v3_per>;
[all …]
/freebsd/sys/powerpc/powerpc/
H A Ddb_trace.c4 /*-
9 * Permission to use, copy, modify and distribute this software and its
19 * Carnegie Mellon requests users of this software to return to
24 * Pittsburgh PA 15213-3890
27 * the rights to redistribute these changes.
53 #define DB_OFFSET(x) (db_expr_t *)offsetof(struct trapframe, x) argument
120 reg = (register_t*)((uintptr_t)kdb_frame + (uintptr_t)vp->valuep); in db_frame()
178 if (count-- == 0) in db_backtrace()
183 * 4 to convert into calling address (as opposed to in db_backtrace()
187 lr = *(db_addr_t *)(stackframe + 16) - 4; in db_backtrace()
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/allwinner/
H A Dsun50i-a64-pinephone.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include "sun50i-a64.dtsi"
7 #include "sun50i-a64-cpu-opp.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/pwm/pwm.h>
15 chassis-type = "handset";
23 compatible = "pwm-backlight";
25 enable-gpios = <&pio 7 10 GPIO_ACTIVE_HIGH>; /* PH10 */
[all …]
H A Dsun50i-a64-amarula-relic.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 /dts-v1/;
7 #include "sun50i-a64.dtsi"
8 #include "sun50i-a64-cpu-opp.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
13 model = "Amarula A64-Relic";
14 compatible = "amarula,a64-relic", "allwinner,sun50i-a64";
21 stdout-path = "serial0:115200n8";
25 compatible = "i2c-gpio";
26 sda-gpios = <&pio 4 13 GPIO_ACTIVE_HIGH>;
[all …]
H A Dsun50i-a64-nanopi-a64.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 /dts-v1/;
6 #include "sun50i-a64.dtsi"
7 #include "sun50i-a64-cpu-opp.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
13 compatible = "friendlyarm,nanopi-a64", "allwinner,sun50i-a64";
21 stdout-path = "serial0:115200n8";
24 hdmi-connector {
25 compatible = "hdmi-connector";
30 remote-endpoint = <&hdmi_out_con>;
[all …]
H A Dsun55i-a527-cubie-a5e.dts1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT)
4 /dts-v1/;
6 #include "sun55i-a523.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
12 compatible = "radxa,cubie-a5e", "allwinner,sun55i-a527";
20 stdout-path = "serial0:115200n8";
23 ext_osc32k: ext-osc32k-clk {
24 #clock-cells = <0>;
25 compatible = "fixed-clock";
26 clock-frequency = <32768>;
[all …]
H A Dsun50i-a64-bananapi-m64.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 /dts-v1/;
6 #include "sun50i-a64.dtsi"
7 #include "sun50i-a64-cpu-opp.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
12 model = "BananaPi-M64";
13 compatible = "sinovoip,bananapi-m64", "allwinner,sun50i-a64";
22 stdout-path = "serial0:115200n8";
25 hdmi-connector {
26 compatible = "hdmi-connector";
[all …]
H A Dsun50i-a64-orangepi-win.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 // Copyright (C) 2017-2018 Samuel Holland <samuel@sholland.org>
5 /dts-v1/;
7 #include "sun50i-a64.dtsi"
8 #include "sun50i-a64-cpu-opp.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
14 compatible = "xunlong,orangepi-win", "allwinner,sun50i-a64";
26 stdout-path = "serial0:115200n8";
29 hdmi-connector {
30 compatible = "hdmi-connector";
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/exynos/
H A Dexynos5433-tm2e.dts1 // SPDX-License-Identifier: GPL-2.0
11 #include "exynos5433-tm2-common.dtsi"
16 chassis-type = "handset";
22 * clocks properties for DISP CMU for each board to keep them together
25 assigned-clocks = <&cmu_disp CLK_FOUT_DISP_PLL>,
38 assigned-clock-parents = <0>, <0>,
50 assigned-clock-rates = <278000000>, <400000000>;
53 &dsi {
57 vdd3-supply = <&ldo27_reg>;
58 vci-supply = <&ldo28_reg>;
[all …]
H A Dexynos5433-tm2.dts1 // SPDX-License-Identifier: GPL-2.0
11 #include "exynos5433-tm2-common.dtsi"
16 chassis-type = "handset";
22 * clocks properties for DISP CMU for each board to keep them together
25 assigned-clocks = <&cmu_disp CLK_FOUT_DISP_PLL>,
39 assigned-clock-parents = <0>, <0>,
52 assigned-clock-rates = <250000000>, <400000000>;
55 &dsi {
59 vdd3-supply = <&ldo27_reg>;
60 vci-supply = <&ldo28_reg>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/nvidia/
H A Dtegra186.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra186-clock.h>
3 #include <dt-bindings/gpio/tegra186-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/memory/tegra186-mc.h>
7 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
8 #include <dt-bindings/power/tegra186-powergate.h>
9 #include <dt-bindings/reset/tegra186-reset.h>
10 #include <dt-bindings/thermal/tegra186-bpmp-thermal.h>
[all …]
/freebsd/sys/arm/nvidia/tegra124/
H A Dtegra124_clk_pll.c1 /*-
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
38 #include <dt-bindings/clock/tegra124-car.h>
88 /* Post divider <-> register value mapping. */
124 PLLM: Clock source for EMC 2x clock
133 PLLD: Clock sources for the DSI and display subsystem
134 PLLD2: Clock sources for the DSI and display subsystem
216 /* PLLM: 880 MHz Clock source for EMC 2x clock */
319 /* PLLD: 600 MHz Clock sources for the DSI and display subsystem */
[all …]
/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dstm32mp157f-dk2.dts1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2025 - All Rights Reserved
7 /dts-v1/;
11 #include "stm32mp15-pinctrl.dtsi"
12 #include "stm32mp15xxac-pinctrl.dtsi"
13 #include "stm32mp15xx-dkx.dtsi"
14 #include "stm32mp157f-dk2-scmi.dtsi"
17 model = "STMicroelectronics STM32MP157F-DK2 Discovery Board";
18 compatible = "st,stm32mp157f-dk2", "st,stm32mp157";
26 stdout-path = "serial0:115200n8";
[all …]
H A Dste-href-tvk1281618-r3.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/input/input.h>
12 compatible = "gpio-keys";
13 #address-cells = <1>;
14 #size-cells = <0>;
15 vdd-supply = <&ab8500_ldo_aux1_reg>;
16 pinctrl-names = "default";
17 pinctrl-0 = <&hall_tvk_mode>;
32 interrupt-parent = <&gpio2>;
[all …]
H A Dste-href-tvk1281618-r2.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/input/input.h>
11 compatible = "gpio-keys";
12 #address-cell
[all...]
H A Dste-ux500-samsung-skomer.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Devicetree for the Samsung XCover 2 GT-S7710 also known as Skomer.
6 /dts-v1/;
7 #include "ste-db8500.dtsi"
8 #include "ste-ab8505.dtsi"
9 #include "ste-dbx5x0-pinctrl.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dsdm845-xiaomi-polaris.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
12 #include <dt-bindings/input/linux-event-codes.h>
13 #include <dt-bindings/sound/qcom,q6afe.h>
14 #include <dt-bindings/sound/qcom,q6asm.h>
16 #include "sdm845-wcd9340.dtsi"
25 /delete-node/ &rmtfs_mem;
[all …]
H A Dmsm8998-xiaomi-sagit.dts1 // SPDX-License-Identifier: BSD-3-Clause
3 * Xiaomi Mi 6 (sagit) device tree source based on msm8998-mtp.dtsi
10 /dts-v1/;
16 #include <dt-bindings/input/input.h>
17 #include <dt-bindings/leds/common.h>
18 #include <dt-bindings/pinctrl/qcom,pmic-gpi
[all...]
/freebsd/sys/contrib/device-tree/src/arm/allwinner/
H A Dsun8i-a83t-tbs-a711.dts5 * This file is dual-licensed: you can use it either under the terms
7 * licensing only applies to this file, and not this project as a
22 * b) Permission is hereby granted, free of charge, to any person
24 * files (the "Software"), to deal in the Software without
25 * restriction, including without limitation the rights to use,
27 * sell copies of the Software, and to permit persons to whom the
28 * Software is furnished to do so, subject to the following
35 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
44 /dts-v1/;
45 #include "sun8i-a83t.dtsi"
[all …]

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