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/freebsd/sys/contrib/dev/iwlwifi/pcie/
H A Dctxt-info.c50 struct iwl_dram_data *dram) in iwl_pcie_ctxt_info_alloc_dma() argument
52 dram->block = iwl_pcie_ctxt_info_dma_alloc_coherent(trans, len, in iwl_pcie_ctxt_info_alloc_dma()
53 &dram->physical); in iwl_pcie_ctxt_info_alloc_dma()
54 if (!dram->block) in iwl_pcie_ctxt_info_alloc_dma()
57 dram->size = len; in iwl_pcie_ctxt_info_alloc_dma()
58 memcpy(dram->block, data, len); in iwl_pcie_ctxt_info_alloc_dma()
65 struct iwl_self_init_dram *dram = &trans->init_dram; in iwl_pcie_ctxt_info_free_paging() local
68 if (!dram->paging) { in iwl_pcie_ctxt_info_free_paging()
69 WARN_ON(dram->paging_cnt); in iwl_pcie_ctxt_info_free_paging()
74 for (i = 0; i < dram in iwl_pcie_ctxt_info_free_paging()
88 struct iwl_self_init_dram *dram = &trans->init_dram; iwl_pcie_init_fw_sec() local
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H A Dctxt-info-gen3.c50 "WRT: Applying DRAM buffer destination\n"); in iwl_pcie_ctxt_info_dbg_enable()
83 "WRT: Applying DRAM destination (debug_token_config=%u)\n", in iwl_pcie_ctxt_info_gen3_init()
86 "WRT: Applying DRAM destination (alloc_id=%u, num_frags=%u)\n", in iwl_pcie_ctxt_info_gen3_init()
173 /* allocate ucode sections in dram and set addresses */ in iwl_pcie_ctxt_info_gen3_init()
174 ret = iwl_pcie_init_fw_sec(trans, fw, &prph_scratch->dram); in iwl_pcie_ctxt_info_gen3_init()
316 struct iwl_dram_data *dram) in iwl_pcie_load_payloads_continuously()
334 dram->block = iwl_pcie_ctxt_info_dma_alloc_coherent(trans, len, in iwl_pcie_load_payloads_segments()
335 &dram->physical); in iwl_pcie_load_payloads_segments()
336 if (!dram->block) { in iwl_pcie_load_payloads_segments()
341 dram in iwl_pcie_load_payloads_segments()
290 iwl_pcie_load_payloads_continuously(struct iwl_trans * trans,const struct iwl_pnvm_image * pnvm_data,struct iwl_dram_data * dram) iwl_pcie_load_payloads_continuously() argument
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/freebsd/sys/contrib/device-tree/Bindings/devfreq/
H A Drk3399_dmc.txt43 clocks freq is half of DRAM clock), default
60 The controller, pi, PHY and DRAM clock will
74 - rockchip,ddr3_odt_dis_freq : When the DRAM type is DDR3, this parameter defines
77 the ODT on the DRAM side and controller side are
80 - rockchip,ddr3_drv : When the DRAM type is DDR3, this parameter defines
81 the DRAM side driver strength in ohms. Default
84 - rockchip,ddr3_odt : When the DRAM type is DDR3, this parameter defines
85 the DRAM side ODT strength in ohms. Default value
88 - rockchip,phy_ddr3_ca_drv : When the DRAM type is DDR3, this parameter defines
93 - rockchip,phy_ddr3_dq_drv : When the DRAM type is DDR3, this parameter defines
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/freebsd/lib/libpmc/pmu-events/arch/x86/sandybridge/
H A Dmemory.json147 …on": "Counts all demand & prefetch code reads that miss the LLC and the data returned from dram.",
151 "EventName": "OFFCORE_RESPONSE.ALL_CODE_RD.LLC_MISS.DRAM",
159 …on": "Counts all demand & prefetch data reads that miss the LLC and the data returned from dram.",
163 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.LLC_MISS.DRAM",
171 …Description": "Counts all prefetch code reads that miss the LLC and the data returned from dram.",
175 "EventName": "OFFCORE_RESPONSE.ALL_PF_CODE_RD.LLC_MISS.DRAM",
183 …Description": "Counts all prefetch data reads that miss the LLC and the data returned from dram.",
187 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.LLC_MISS.DRAM",
195 …"BriefDescription": "Counts all prefetch RFOs that miss the LLC and the data returned from dram.",
199 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.LLC_MISS.DRAM",
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/freebsd/lib/libpmc/pmu-events/arch/x86/nehalemep/
H A Dmemory.json3 "BriefDescription": "Offcore data reads satisfied by any DRAM",
25 "BriefDescription": "Offcore data reads satisfied by the local DRAM",
36 "BriefDescription": "Offcore data reads satisfied by a remote DRAM",
47 "BriefDescription": "Offcore code reads satisfied by any DRAM",
69 "BriefDescription": "Offcore code reads satisfied by the local DRAM",
80 "BriefDescription": "Offcore code reads satisfied by a remote DRAM",
91 "BriefDescription": "Offcore requests satisfied by any DRAM",
113 "BriefDescription": "Offcore requests satisfied by the local DRAM",
124 "BriefDescription": "Offcore requests satisfied by a remote DRAM",
135 "BriefDescription": "Offcore RFO requests satisfied by any DRAM",
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/freebsd/lib/libpmc/pmu-events/arch/x86/nehalemex/
H A Dmemory.json10 "BriefDescription": "Offcore data reads satisfied by any DRAM",
32 "BriefDescription": "Offcore data reads satisfied by the local DRAM",
43 "BriefDescription": "Offcore data reads satisfied by a remote DRAM",
54 "BriefDescription": "Offcore code reads satisfied by any DRAM",
76 "BriefDescription": "Offcore code reads satisfied by the local DRAM",
87 "BriefDescription": "Offcore code reads satisfied by a remote DRAM",
98 "BriefDescription": "Offcore requests satisfied by any DRAM",
120 "BriefDescription": "Offcore requests satisfied by the local DRAM",
131 "BriefDescription": "Offcore requests satisfied by a remote DRAM",
142 "BriefDescription": "Offcore RFO requests satisfied by any DRAM",
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/freebsd/lib/libpmc/pmu-events/arch/x86/westmereex/
H A Dmemory.json11 "BriefDescription": "Offcore data reads satisfied by any DRAM",
33 "BriefDescription": "Offcore data reads satisfied by the local DRAM",
44 "BriefDescription": "Offcore data reads satisfied by a remote DRAM",
55 "BriefDescription": "Offcore code reads satisfied by any DRAM",
77 "BriefDescription": "Offcore code reads satisfied by the local DRAM",
88 "BriefDescription": "Offcore code reads satisfied by a remote DRAM",
99 "BriefDescription": "Offcore requests satisfied by any DRAM",
121 "BriefDescription": "Offcore requests satisfied by the local DRAM",
132 "BriefDescription": "Offcore requests satisfied by a remote DRAM",
143 "BriefDescription": "Offcore RFO requests satisfied by any DRAM",
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/freebsd/lib/libpmc/pmu-events/arch/x86/amdzen1/
H A Ddata-fabric.json36 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe…
44 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe…
52 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe…
60 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe…
68 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe…
76 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe…
84 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe…
92 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe…
/freebsd/lib/libpmc/pmu-events/arch/x86/amdzen2/
H A Ddata-fabric.json36 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe…
44 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe…
52 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe…
60 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe…
68 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe…
76 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe…
84 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe…
92 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe…
/freebsd/lib/libpmc/pmu-events/arch/x86/amdzen3/
H A Ddata-fabric.json36 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe…
44 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe…
52 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe…
60 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe…
68 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe…
76 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe…
84 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe…
92 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe…
/freebsd/lib/libpmc/pmu-events/arch/x86/westmereep-sp/
H A Dmemory.json3 "BriefDescription": "Offcore data reads satisfied by any DRAM",
25 "BriefDescription": "Offcore data reads satisfied by the local DRAM",
36 "BriefDescription": "Offcore data reads satisfied by a remote DRAM",
47 "BriefDescription": "Offcore code reads satisfied by any DRAM",
69 "BriefDescription": "Offcore code reads satisfied by the local DRAM",
80 "BriefDescription": "Offcore code reads satisfied by a remote DRAM",
91 "BriefDescription": "Offcore requests satisfied by any DRAM",
113 "BriefDescription": "Offcore requests satisfied by the local DRAM",
124 "BriefDescription": "Offcore requests satisfied by a remote DRAM",
135 "BriefDescription": "Offcore RFO requests satisfied by any DRAM",
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/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/
H A Drockchip,rk3399-dmc.yaml71 SR_IDLE * 1024 DFI clock cycles (DFI clocks freq is half of DRAM clock).
100 self-refresh mode. The controller, pi, PHY and DRAM clock will be gated
130 When the DRAM type is DDR3, this parameter defines the ODT disable
132 the ODT on the DRAM side and controller side are both disabled.
138 When the DRAM type is DDR3, this parameter defines the DRAM side drive
146 When the DRAM type is DDR3, this parameter defines the DRAM side ODT
154 When the DRAM type is DDR3, this parameter defines the phy side CA line
162 When the DRAM typ
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/freebsd/lib/libpmc/
H A Dpmc.corei7uc.3420 Uncore cycles all the entries in the DRAM channel 0 medium or low priority
424 Uncore cycles all the entries in the DRAM channel 1 medium or low priority
428 Uncore cycles all the entries in the DRAM channel 2 medium or low priority
432 Uncore cycles all the entries in the DRAM channel 0 medium or low priority
436 Counts cycles all the entries in the DRAM channel 1 medium or low priority
440 Uncore cycles all the entries in the DRAM channel 2 medium or low priority
444 Counts cycles all the entries in the DRAM channel 0 high priority queue are
448 Counts cycles all the entries in the DRAM channel 1 high priority queue are
452 Counts cycles all the entries in the DRAM channel 2 high priority queue are
456 Counts cycles all the entries in the DRAM channel 0 high priority queue are
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H A Dpmc.westmereuc.3474 Counts cycles all the entries in the DRAM channel 0 high priority queue are
478 Counts cycles all the entries in the DRAM channel 1 high priority queue are
482 Counts cycles all the entries in the DRAM channel 2 high priority queue are
486 Counts cycles all the entries in the DRAM channel 0 high priority queue are
490 Counts cycles all the entries in the DRAM channel 1 high priority queue are
494 Counts cycles all the entries in the DRAM channel 2 high priority queue are
499 read request to DRAM channel 0.
503 read request to DRAM channel 1.
507 read request to DRAM channel 2.
511 write request to DRAM channel 0.
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/freebsd/lib/libpmc/pmu-events/arch/x86/skylakex/
H A Duncore-memory.json50 "BriefDescription": "Cycles where DRAM ranks are in power down (CKE) mode",
88 "BriefDescription": "DRAM Page Activate commands sent due to a write request",
93 …DRAM Page Activate commands sent on this channel due to a write request to the iMC (Memory Control…
98 "BriefDescription": "All DRAM CAS Commands issued",
103 …DRAM per memory channel. CAS commands are issued to specify the address to read or write on DRAM,…
108 "BriefDescription": "All DRAM Read CAS Commands issued (does not include underfills)",
113 …DRAM on a per channel basis. CAS commands are issued to specify the address to read or write on D…
118 "BriefDescription": "DRAM Underfill Read CAS Commands issued",
123 …DRAM due to a partial write, on a per channel basis. CAS commands are issued to specify the addre…
128 …"BriefDescription": "DRAM CAS (Column Address Strobe) Commands.; DRAM WR_CAS (w/ and w/out auto-pr…
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/freebsd/lib/libpmc/pmu-events/arch/x86/tremontx/
H A Duncore-memory.json75 "BriefDescription": "DRAM Activate Count : All Activates",
81 …DRAM Activate Count : All Activates : Counts the number of DRAM Activate commands sent on this cha…
86 "BriefDescription": "All DRAM CAS commands issued",
92 "PublicDescription": "Counts the total number of DRAM CAS commands issued on this channel.",
97 "BriefDescription": "Number of DRAM Refreshes Issued",
103 … "PublicDescription": "Number of DRAM Refreshes Issued : Counts the number of refreshes issued.",
108 "BriefDescription": "Number of DRAM Refreshes Issued",
114 … "PublicDescription": "Number of DRAM Refreshes Issued : Counts the number of refreshes issued.",
119 "BriefDescription": "Number of DRAM Refreshes Issued",
125 … "PublicDescription": "Number of DRAM Refreshes Issued : Counts the number of refreshes issued.",
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H A Dother.json148 "BriefDescription": "Counts all code reads that were supplied by DRAM.",
151 "EventName": "OCR.ALL_CODE_RD.DRAM",
159 "BriefDescription": "Counts all code reads that were supplied by DRAM.",
214 …Counts demand instruction fetches and L1 instruction cache prefetches that were supplied by DRAM.",
217 "EventName": "OCR.DEMAND_CODE_RD.DRAM",
225 …Counts demand instruction fetches and L1 instruction cache prefetches that were supplied by DRAM.",
247 … cache hardware prefetches and software prefetches (except PREFETCHW) that were supplied by DRAM.",
250 "EventName": "OCR.DEMAND_DATA_AND_L1PF_RD.DRAM",
258 … cache hardware prefetches and software prefetches (except PREFETCHW) that were supplied by DRAM.",
291 …BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_AND_L1PF_RD.DRAM",
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/freebsd/lib/libpmc/pmu-events/arch/x86/icelake/
H A Dother.json53 …ounts demand instruction fetches and L1 instruction cache prefetches that DRAM supplied the reques…
57 "EventName": "OCR.DEMAND_CODE_RD.DRAM",
67 …ounts demand instruction fetches and L1 instruction cache prefetches that DRAM supplied the reques…
95 "BriefDescription": "Counts demand data reads that DRAM supplied the request.",
99 "EventName": "OCR.DEMAND_DATA_RD.DRAM",
109 "BriefDescription": "Counts demand data reads that DRAM supplied the request.",
137 …requests and software prefetches for exclusive ownership (PREFETCHW) that DRAM supplied the reques…
141 "EventName": "OCR.DEMAND_RFO.DRAM",
151 …requests and software prefetches for exclusive ownership (PREFETCHW) that DRAM supplied the reques…
179 …a cache prefetch requests and software prefetches (except PREFETCHW) that DRAM supplied the reques…
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/freebsd/lib/libpmc/pmu-events/arch/x86/cascadelakex/
H A Duncore-memory.json50 "BriefDescription": "Cycles where DRAM ranks are in power down (CKE) mode+C37",
195 "BriefDescription": "DRAM Page Activate commands sent due to a write request",
200 …DRAM Page Activate commands sent on this channel due to a write request to the iMC (Memory Control…
205 "BriefDescription": "All DRAM CAS Commands issued",
210 …DRAM per memory channel. CAS commands are issued to specify the address to read or write on DRAM,…
215 "BriefDescription": "All DRAM Read CAS Commands issued (does not include underfills)",
220 …DRAM on a per channel basis. CAS commands are issued to specify the address to read or write on D…
225 "BriefDescription": "DRAM Underfill Read CAS Commands issued",
230 …DRAM due to a partial write, on a per channel basis. CAS commands are issued to specify the addre…
235 …"BriefDescription": "DRAM CAS (Column Address Strobe) Commands.; DRAM WR_CAS (w/ and w/out auto-pr…
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/freebsd/lib/libpmc/pmu-events/arch/x86/sapphirerapids/
H A Dother.json33 …Counts demand instruction fetches and L1 instruction cache prefetches that were supplied by DRAM.",
36 "EventName": "OCR.DEMAND_CODE_RD.DRAM",
44 …es that were supplied by DRAM attached to this socket, unless in Sub NUMA Cluster(SNC) Mode. In S…
55 …ruction fetches and L1 instruction cache prefetches that were supplied by DRAM on a distant memory…
77 "BriefDescription": "Counts demand data reads that were supplied by DRAM.",
80 "EventName": "OCR.DEMAND_DATA_RD.DRAM",
88 …ds that were supplied by DRAM attached to this socket, unless in Sub NUMA Cluster(SNC) Mode. In S…
99 …"BriefDescription": "Counts demand data reads that were supplied by DRAM attached to another socke…
121 …"BriefDescription": "Counts demand data reads that were supplied by DRAM on a distant memory contr…
143 … requests and software prefetches for exclusive ownership (PREFETCHW) that were supplied by DRAM.",
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H A Duncore-memory.json23 "BriefDescription": "All DRAM read CAS commands issued (does not include underfills)",
34 "BriefDescription": "DRAM underfill read CAS commands issued",
45 "BriefDescription": "All DRAM read CAS commands issued (including underfills)",
56 "BriefDescription": "All DRAM write CAS commands issued",
258 "BriefDescription": "DRAM Precharge commands. : Precharge due to (?)",
280 "BriefDescription": "All DRAM CAS commands issued",
291 "BriefDescription": "DRAM RD_CAS and WR_CAS Commands",
302 "BriefDescription": "DRAM RD_CAS and WR_CAS Commands",
313 "BriefDescription": "DRAM RD_CAS and WR_CAS Commands",
346 "BriefDescription": "DRAM Precharge commands. : Precharge due to read",
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/freebsd/sys/contrib/dev/iwlwifi/
H A Diwl-context-info.h9 /* maximmum number of DRAM map entries supported by FW */
79 * struct iwl_context_info_dram - images DRAM map
80 * each entry in the map represents a DRAM chunk of up to 32 KB
81 * @umac_img: UMAC image DRAM map
82 * @lmac_img: LMAC image DRAM map
83 * @virtual_img: paged image DRAM map
116 * @core_dump_addr: core dump (debug DRAM address) start address
138 * dumping DRAM addresses
157 * @dram: firmware image addresses in DRAM
170 struct iwl_context_info_dram dram; member
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/freebsd/lib/libpmc/pmu-events/arch/x86/alderlake/
H A Duncore-memory.json129 "BriefDescription": "Read CAS command sent to DRAM",
138 "BriefDescription": "Write CAS command sent to DRAM",
147 "BriefDescription": "ACT command for a read request sent to DRAM",
156 "BriefDescription": "ACT command for a write request sent to DRAM",
165 "BriefDescription": "ACT command sent to DRAM",
174 "BriefDescription": "PRE command sent to DRAM for a read/write request",
183 "BriefDescription": "PRE command sent to DRAM due to page table idle timer expiration",
192 …ion": "Counts every 64B read request entering the Memory Controller 0 to DRAM (sum of all channel…
199 …"BriefDescription": "Counts every 64B read request entering the Memory Controller 1 to DRAM (sum o…
207 …DRAM (sum of all channels). Each write request counts as a new request incrementing this counter. …
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/freebsd/sys/contrib/device-tree/Bindings/arm/sunxi/
H A Dallwinner,sun4i-a10-mbus.yaml51 - description: DRAM controller/PHY registers
57 - const: dram
63 - description: DRAM controller/PHY module clock
64 - description: Register bus clock, shared by MBUS and DRAM
70 - const: dram
141 dram-controller@1c01000 {
152 dram-controller@1c62000 {
156 reg-names = "mbus", "dram";
160 clock-names = "mbus", "dram", "bus";
/freebsd/lib/libpmc/pmu-events/arch/x86/icelakex/
H A Dother.json134 …Counts demand instruction fetches and L1 instruction cache prefetches that were supplied by DRAM.",
137 "EventName": "OCR.DEMAND_CODE_RD.DRAM",
145 …es that were supplied by DRAM attached to this socket, unless in Sub NUMA Cluster(SNC) Mode. In S…
156 …ruction fetches and L1 instruction cache prefetches that were supplied by DRAM on a distant memory…
178 "BriefDescription": "Counts demand data reads that were supplied by DRAM.",
181 "EventName": "OCR.DEMAND_DATA_RD.DRAM",
189 …ds that were supplied by DRAM attached to this socket, unless in Sub NUMA Cluster(SNC) Mode. In S…
222 …"BriefDescription": "Counts demand data reads that were supplied by DRAM attached to another socke…
244 …"BriefDescription": "Counts demand data reads that were supplied by DRAM on a distant memory contr…
277 … requests and software prefetches for exclusive ownership (PREFETCHW) that were supplied by DRAM.",
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