| /linux/Documentation/devicetree/bindings/iommu/ |
| H A D | ti,omap-iommu.txt | 7 "ti,dra7-dsp-iommu" for DRA7xx DSP IOMMU instances
8 "ti,dra7-iommu" for DRA7xx IOMMU instances
27 is required for DSP IOMMU instances on DRA7xx SoCs. The
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| /linux/Documentation/devicetree/bindings/net/ |
| H A D | cpsw-phy-sel.txt | 6 "ti,dra7xx-cpsw-phy-sel" for dra7xx platform
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| /linux/Documentation/devicetree/bindings/mailbox/ |
| H A D | ti,omap-mailbox.yaml | 32 registers. All the current OMAP SoCs except for the newest DRA7xx SoC has a
33 single IP instance. DRA7xx has multiple instances with different number of
35 lines can also be routed to different processor sub-systems on DRA7xx as they
121 - ti,omap4-mailbox # for OMAP44xx, OMAP54xx, AM33xx, AM43xx and DRA7xx SoCs
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| /linux/Documentation/devicetree/bindings/memory-controllers/ti/ |
| H A D | emif.txt | 16 "ti,emif-dra7xx"
81 compatible = "ti,emif-dra7xx";
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| /linux/Documentation/devicetree/bindings/phy/ |
| H A D | ti,phy-gmii-sel.yaml | 52 - ti,dra7xx-phy-gmii-sel
86 - ti,dra7xx-phy-gmii-sel
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| /linux/arch/arm/boot/dts/ti/omap/ |
| H A D | dra74x-p.dtsi | 16 compatible = "ti,emif-dra7xx";
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| H A D | dra7-mmc-iodelay.dtsi | 3 * MMC IOdelay values for TI's DRA7xx SoCs.
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| H A D | dra7-ipu-dsp-common.dtsi | 3 * Common IPU and DSP data for TI DRA7xx/AM57xx platforms
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| H A D | dra7-evm-common.dtsi | 28 simple-audio-card,name = "DRA7xx-EVM";
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| /linux/Documentation/devicetree/bindings/hwlock/ |
| H A D | ti,omap-hwspinlock.yaml | 15 - ti,omap4-hwspinlock # for OMAP44xx, OMAP54xx, AM33xx, AM43xx, DRA7xx SoCs
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| /linux/arch/arm/mach-omap2/ |
| H A D | cm-regbits-7xx.h | 3 * DRA7xx Clock Management register bits
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| H A D | cm1_7xx.h | 3 * DRA7xx CM1 instance offset macros
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| H A D | cm2_7xx.h | 3 * DRA7xx CM2 instance offset macros
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| H A D | prm7xx.h | 3 * DRA7xx PRM instance offset macros
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| H A D | prcm_mpu7xx.h | 3 * DRA7xx PRCM MPU instance offset macros
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| H A D | Kconfig | 82 bool "TI DRA7XX"
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| H A D | clockdomains7xx_data.c | 3 * DRA7xx Clock domains framework
32 /* Static Dependencies for DRA7xx Clock Domains */
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| H A D | powerdomains7xx_data.c | 3 * DRA7xx Power domains framework
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| /linux/Documentation/devicetree/bindings/remoteproc/ |
| H A D | ti,omap-remoteproc.yaml | 133 and DRA7xx SoCs.
295 //Example 3: DRA7xx/AM57xx DSP
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| /linux/Documentation/devicetree/bindings/display/ti/ |
| H A D | ti,dra7-dss.txt | 20 Some DRA7xx SoCs have one dedicated video PLL, some have two. These properties
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| /linux/Documentation/devicetree/bindings/pwm/ |
| H A D | pwm-tipwmss.txt | 49 epwmss0: epwmss@4843e000 { /* PWMSS for DRA7xx */
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| /linux/Documentation/devicetree/bindings/dma/ |
| H A D | ti-dma-crossbar.txt | 4 - compatible: "ti,dra7-dma-crossbar" for DRA7xx DMA crossbar
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| /linux/drivers/net/ethernet/ti/ |
| H A D | cpsw-phy-sel.c | 196 .compatible = "ti,dra7xx-cpsw-phy-sel",
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| /linux/drivers/iommu/ |
| H A D | omap-iommu.h | 199 * DSP_SYSTEM registers and bit definitions (applicable only for DRA7xx DSP)
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| /linux/drivers/edac/ |
| H A D | ti_edac.c | 197 { .compatible = "ti,emif-dra7xx", .data = (void *)EMIF_TYPE_DRA7 },
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