Searched full:dp83867_clk_o_sel_chn_a_rclk (Results 1 – 2 of 2) sorted by relevance
38 #define DP83867_CLK_O_SEL_CHN_A_RCLK 0x0 macro
137 ti,clk-output-sel = <DP83867_CLK_O_SEL_CHN_A_RCLK>;