| /freebsd/sys/contrib/device-tree/Bindings/i2c/ |
| H A D | i2c-imx.txt | 1 * Freescale Inter IC (I2C) and High Speed Inter IC (HS-I2C) for i.MX
4 - compatible :
5 - "fsl,imx1-i2c" for I2C compatible with the one integrated on i.MX1 SoC
6 - "fsl,imx21-i2c" for I2C compatible with the one integrated on i.MX21 SoC
7 - "fsl,vf610-i2c" for I2C compatible with the one integrated on Vybrid vf610 SoC
8 - reg : Should contain I2C/HS-I2C registers location and length
9 - interrupts : Should contain I2C/HS-I2C interrupt
10 - clocks : Should contain the I2C/HS-I2C clock specifier
13 - clock-frequency : Constains desired I2C/HS-I2C bus clock frequency in Hz.
15 - dmas: A list of two dma specifiers, one for each entry in dma-names.
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| H A D | i2c-at91.txt | 4 - compatible : Must be one of:
5 "atmel,at91rm9200-i2c",
6 "atmel,at91sam9261-i2c",
7 "atmel,at91sam9260-i2c",
8 "atmel,at91sam9g20-i2c",
9 "atmel,at91sam9g10-i2c",
10 "atmel,at91sam9x5-i2c",
11 "atmel,sama5d4-i2c",
12 "atmel,sama5d2-i2c",
13 "microchip,sam9x60-i2c".
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| /freebsd/sys/dev/axgbe/ |
| H A D | xgbe.h | 4 * Copyright (c) 2014-2016,2020 Advanced Micro Devices, Inc.
134 #define XGBE_DRV_NAME "amd-xgbe"
138 /* Descriptor related defines */
151 #define XGBE_TX_MAX_BUF_SIZE (0x3fff & ~(64 - 1))
157 * - Maximum number of SKB frags
158 * - Maximum descriptors for contiguous TSO/GSO packet
159 * - Possible context descriptor
160 * - Possible TSO header descriptor
174 /* DMA cache settings - Oute
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| /freebsd/sys/dev/qlxge/ |
| H A D | qls_def.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2013-2014 Qlogic Corporation
39 * structure encapsulating a DMA buffer
64 * Transmit Related Definitions
77 (PAGE_SIZE - 1)) & ~(PAGE_SIZE - 1))
81 #define QLA_MAX_TSO_FRAME_SIZE ((64 * 1024 - 1) + 22)
131 * Receive Related Definitions
145 ((QLA_LBQ_SIZE + PAGE_SIZE + (PAGE_SIZE - 1)) & ~(PAGE_SIZE - 1))
153 ((QLA_SBQ_SIZE + PAGE_SIZE + (PAGE_SIZE - 1)) & ~(PAGE_SIZE - 1))
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| /freebsd/sys/contrib/device-tree/Bindings/sound/ |
| H A D | fsl,esai.txt | 3 The Enhanced Serial Audio Interface (ESAI) provides a full-duplex serial port
10 - compatible : Compatible list, should contain one of the following
12 "fsl,imx35-esai",
13 "fsl,vf610-esai",
14 "fsl,imx6ull-esai",
15 "fsl,imx8qm-esai",
17 - reg : Offset and length of the register set for the device.
19 - interrupts : Contains the spdif interrupt.
21 - dmas : Generic dma devicetre
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| H A D | fsl,esai.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shengjiu Wang <shengjiu.wang@nxp.com>
11 - Frank Li <Frank.Li@nxp.com>
14 The Enhanced Serial Audio Interface (ESAI) provides a full-duplex serial port
22 - fsl,imx35-esai
23 - fsl,imx6ull-esai
24 - fsl,imx8qm-esai
25 - fsl,vf610-esai
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| H A D | st,stm32-sai.txt | 4 as I2S standards, LSB or MSB-justified, PCM/DSP, TDM, and AC'97.
5 The SAI contains two independent audio sub-blocks. Each sub-block has
9 - compatible: Should be "st,stm32f4-sai" or "st,stm32h7-sai"
10 - reg: Base address and size of SAI common register set.
11 - clocks: Must contain phandle and clock specifier pairs for each entry
12 in clock-names.
13 - clock-names: Must contain "pclk" "x8k" and "x11k"
15 Mandatory for "st,stm32h7-sai" compatible.
16 Not used for "st,stm32f4-sai" compatible.
19 - interrupts: cpu DAI interrupt line shared by SAI sub-blocks
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| H A D | st,stm32-sai.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/st,stm32-sai.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Olivier Moysan <olivier.moysan@foss.st.com>
14 protocols as I2S standards, LSB or MSB-justified, PCM/DSP, TDM, and AC'97.
15 The SAI contains two independent audio sub-blocks. Each sub-block has
21 - st,stm32f4-sai
22 - st,stm32h7-sai
26 - description: Base address and size of SAI common register set.
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| /freebsd/sys/contrib/device-tree/Bindings/net/ |
| H A D | xilinx_axienet.txt | 2 --------------------------------------------------------
11 sent and received through means of an AXI DMA controller. This driver
12 includes the DMA driver code, so this driver is incompatible with AXI DMA
18 - compatible : Must be one of "xlnx,axi-ethernet-1.00.a",
19 "xlnx,axi-ethernet-1.01.a", "xlnx,axi-ethernet-2.01.a"
20 - reg : Address and length of the IO space, as well as the address
21 and length of the AXI DMA controller IO space, unless
22 axistream-connected is specified, in which case the reg
24 - interrupts : Should be a list of 2 or 3 interrupts: TX DMA, RX DMA,
25 and optionally Ethernet core. If axistream-connected is
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| H A D | xlnx,axi-ethernet.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/xlnx,axi-ethernet.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
17 sent and received through means of an AXI DMA controller. This driver
18 includes the DMA driver code, so this driver is incompatible with AXI DMA
22 - Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
27 - xlnx,axi-ethernet-1.00.a
28 - xlnx,axi-ethernet-1.01.a
29 - xlnx,axi-ethernet-2.01.a
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| H A D | ti,icssg-prueth.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/ti,icssg-prueth.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Md Danish Anwar <danishanwar@ti.com>
13 Ethernet based on the Programmable Real-Time Unit and Industrial
19 - ti,am642-icssg-prueth # for AM64x SoC family
20 - ti,am654-icssg-prueth # for AM65x SoC family
21 - ti,am654-sr1-icssg-prueth # for AM65x SoC family, SR1.0
32 dma-names:
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| /freebsd/sys/contrib/device-tree/Bindings/mtd/ |
| H A D | brcm,brcmnand.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Brian Norris <computersforpeace@gmail.com>
11 - Kamal Dasu <kdasu.kdev@gmail.com>
12 - William Zhang <william.zhang@broadcom.com>
15 The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND
16 flash chips. It has a memory-mapped register interface for both control
18 is paired with a custom DMA engine (inventively named "Flash DMA") which
27 -- Additional SoC-specific NAND controller properties --
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| H A D | brcm,brcmnand.txt | 3 The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND
4 flash chips. It has a memory-mapped register interface for both control
6 paired with a custom DMA engine (inventively named "Flash DMA") which supports
15 - compatible : May contain an SoC-specific compatibility string (see below)
16 to account for any SoC-specific hardware bits that may be
21 string, like "brcm,brcmnand-v7.0"
23 brcm,brcmnand-v2.1
24 brcm,brcmnand-v2.2
25 brcm,brcmnand-v4.0
26 brcm,brcmnand-v5.0
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| H A D | marvell,nand-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/marvell,nand-controlle
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| H A D | marvell-nand.txt | 4 - compatible: can be one of the following:
5 * "marvell,armada-8k-nand-controller"
6 * "marvell,armada370-nand-controller"
7 * "marvell,pxa3xx-nand-controller"
8 * "marvell,armada-8k-nand" (deprecated)
9 * "marvell,armada370-nand" (deprecated)
10 * "marvell,pxa3xx-nand" (deprecated)
13 - reg: NAND flash controller memory area.
14 - #address-cells: shall be set to 1. Encode the NAND CS.
15 - #size-cells: shall be set to 0.
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| /freebsd/sys/contrib/ena-com/ |
| H A D | ena_plat.h | 1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
4 * Copyright (c) 2015-2023 Amazon.com, Inc. or its affiliates.
139 const __typeof(((type *)0)->member) *__p = (ptr); \
140 (type *)((uintptr_t)__p - offsetof(type, member)); \
144 ena_log((ctx)->dmadev, level, "%s() [TID:%d]: " \
145 fmt, __func__, curthread->td_tid, ##args)
187 #define GENMASK(h, l) (((~0U) - (1U << (l)) + 1) & (~0U >> (32 - 1 - (h))))
188 #define GENMASK_ULL(h, l) (((~0ULL) << (l)) & (~0ULL >> (64 - 1 - (h))))
202 #define ENA_COM_TRY_AGAIN -1
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| /freebsd/share/man/man4/ |
| H A D | ioat.4 | 34 .Bd -ragged -offset indent
40 .Bd -literal -offset indent
142 driver provides a kernel API to a variety of DMA engines on some Intel server
145 There is a number of DMA channels per CPU package.
150 Blockfill operations can be used to write a 64-bit pattern to memory.
152 Copy operations can be used to offload memory copies to the DMA engines.
167 Software can control this on a per-channel basis with the
177 All operations are safe to use in a non-blocking context with the
186 For example, such a scenario can happen when two related DMA operations are
188 First, a DMA copy to one location (A), followed directly by a DMA copy
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| H A D | mlx5ib.4 | 30 .Nd "Mellanox ConnectX-4 and ConnectX-4 LX based 100Gb, 50Gb, 40Gb, 25Gb and 10Gb network adapter d…
34 .Bd -ragged -offset indent
40 To load the driver as a module at run-time,
42 .Bd -literal -offset indent
49 .Bd -literal -offset indent
55 driver provides support for infiniband and Remote DMA over Converged Ethernet,
56 RoCE, for PCI Express network adapters based on ConnectX-4 and ConnectX-4 LX.
58 For further hardware information and questions related to hardware
68 ConnectX-4 supports: 10/20/25/40/50/56/100Gb/s speeds.
69 ConnectX-4 LX supports: 10/25/40/50Gb/s speeds (and reduced power consumption):
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| /freebsd/sys/dev/ata/ |
| H A D | ata-all.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 1998 - 2008 Søren Schmidt <sos@FreeBSD.org>
38 #define ATA_F_DMA 0x01 /* enable DMA */
78 #define ATA_S_DMA 0x20 /* DMA ready */
152 /* DMA register defines */
266 struct ata_dmaslot *dma; /* DMA slot of this request */ member
289 if (request->flags & ATA_R_DEBUG) \
290 device_printf(request->parent, "req=%p %s " string "\n", \
317 /* structure for holding DMA Physical Region Descriptors (PRD) entries */
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| /freebsd/sys/contrib/device-tree/Bindings/spi/ |
| H A D | renesas,rspi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
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| H A D | renesas,sh-msiof.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/renesas,sh-msiof.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Geert Uytterhoeven <geert+renesas@glider.be>
13 - $ref: spi-controller.yaml#
18 - items:
19 - const: renesas,msiof-sh73a0 # SH-Mobile AG5
20 - const: renesas,sh-mobile-msiof # generic SH-Mobile compatible
22 - items:
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| /freebsd/sys/dev/pms/RefTisa/tisa/sassata/sas/common/ |
| H A D | tdtypes.h | 2 *Copyright (c) 2014 PMC-Sierra, Inc. All rights reserved.
145 * TD Layer interrupt/non-interrupt context support structure for agsaRoot_t.
147 * In other words, agsaRoot_t->osData points to this structure and used for
161 /** \brief data structure for port/phy related flags
183 /** \brief data structure for both SAS/SATA related flags
201 * SAT related structure
262 tdsaTimerRequest_t DiscoverySMPTimer; /* discovery-related SMP application Timer */
275 bit32 sat48BitSupport; /* Flag for 48-bit addressing */
281 bit32 satDMASupport; /* Flag for DMA Support */
282 bit32 satDMAEnabled; /* Flag for DMA Enabled */
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| /freebsd/usr.sbin/acpi/acpidump/ |
| H A D | acpidump.8 | 101 .Bl -tag -offset indent -width 12345 -compact
104 .It DMAR DMA Remapping Table
105 Contains information about the DMA remapping necessary for the system
121 Information related to power management, and other CPU related data.
135 .It MCFG PCI Express Memory-mapped Configuration
168 the DSDT consists of free-formatted AML data.
172 .Bl -tag -width indent
207 .Bl -tag -width /dev/mem
213 .Bd -literal -offset indent
214 # acpidump -dt | gzip -c9 > my_computer.asl.gz
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| /freebsd/sys/contrib/device-tree/Bindings/pci/ |
| H A D | rcar-pci.txt | 1 * Renesas R-Car PCIe interface
4 compatible: "renesas,pcie-r8a7742" for the R8A7742 SoC;
5 "renesas,pcie-r8a7743" for the R8A7743 SoC;
6 "renesas,pcie-r8a7744" for the R8A7744 SoC;
7 "renesas,pcie-r8a774a1" for the R8A774A1 SoC;
8 "renesas,pcie-r8a774b1" for the R8A774B1 SoC;
9 "renesas,pcie-r8a774c0" for the R8A774C0 SoC;
10 "renesas,pcie-r8a7779" for the R8A7779 SoC;
11 "renesas,pcie-r8a7790" for the R8A7790 SoC;
12 "renesas,pcie-r8a7791" for the R8A7791 SoC;
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| /freebsd/sys/i386/include/ |
| H A D | vmparam.h | 1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
45 * Virtual memory related constants, all in bytes
78 * largest physical address that is accessible by ISA DMA is split
95 * that have physical addresses below 4G but are not accessible by ISA DMA,
97 * DMA.
104 #define VM_LOWMEM_BOUNDARY (16 << 20) /* 16MB ISA DMA limit */
108 * Bounce dma is extremely fragile and simultaneously intensively
152 * messy at times, but hey, we'll do anything to save a page :-)
155 #define VM_MAX_KERNEL_ADDRESS (0xffffffffU - 16 * 1024 * 1024 + 1)
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