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/freebsd/sys/contrib/device-tree/Bindings/display/msm/
H A Dqcom,sm8150-dpu.yaml61 <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
64 assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
H A Dqcom,sm8250-dpu.yaml68 <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
71 assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
H A Dqcom,sc8280xp-dpu.yaml70 <&dispcc0 DISP_CC_MDSS_VSYNC_CLK>;
79 <&dispcc0 DISP_CC_MDSS_VSYNC_CLK>;
H A Dqcom,sm8350-dpu.yaml67 <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
75 assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
H A Dqcom,sm8550-dpu.yaml73 <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
81 assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
H A Dqcom,sm8450-dpu.yaml74 <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
82 assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
H A Dqcom,sc8280xp-mdss.yaml104 <&dispcc0 DISP_CC_MDSS_VSYNC_CLK>;
112 assigned-clocks = <&dispcc0 DISP_CC_MDSS_VSYNC_CLK>;
H A Ddpu.txt113 <&clock_dispcc DISP_CC_MDSS_VSYNC_CLK>;
117 <&clock_dispcc DISP_CC_MDSS_VSYNC_CLK>;
H A Dqcom,sm6375-mdss.yaml116 <&dispcc DISP_CC_MDSS_VSYNC_CLK>,
126 assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
H A Dqcom,sm8350-mdss.yaml133 <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
141 assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
H A Dqcom,sm6350-mdss.yaml125 <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
130 <&dispcc DISP_CC_MDSS_VSYNC_CLK>,
H A Dqcom,sm8250-mdss.yaml133 <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
136 assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
H A Dqcom,sm8450-mdss.yaml132 <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
140 assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
/freebsd/sys/contrib/device-tree/include/dt-bindings/clock/
H A Dqcom,dispcc-qcm2290.h25 #define DISP_CC_MDSS_VSYNC_CLK 15 macro
H A Dqcom,sm6115-dispcc.h28 #define DISP_CC_MDSS_VSYNC_CLK 18 macro
H A Dqcom,dispcc-sm6125.h34 #define DISP_CC_MDSS_VSYNC_CLK 25 macro
H A Dqcom,sm6375-dispcc.h30 #define DISP_CC_MDSS_VSYNC_CLK 19 macro
H A Dqcom,dispcc-sc7180.h39 #define DISP_CC_MDSS_VSYNC_CLK 30 macro
H A Dqcom,dispcc-sm6350.h40 #define DISP_CC_MDSS_VSYNC_CLK 29 macro
H A Dqcom,sm4450-dispcc.h33 #define DISP_CC_MDSS_VSYNC_CLK 23 macro
H A Dqcom,dispcc-sc7280.h47 #define DISP_CC_MDSS_VSYNC_CLK 37 macro
H A Dqcom,dispcc-sdm845.h33 #define DISP_CC_MDSS_VSYNC_CLK 23 macro
H A Dqcom,dispcc-sm8150.h54 #define DISP_CC_MDSS_VSYNC_CLK 44 macro
H A Dqcom,dispcc-sm8250.h54 #define DISP_CC_MDSS_VSYNC_CLK 44 macro
H A Dqcom,dispcc-sm8350.h54 #define DISP_CC_MDSS_VSYNC_CLK 44 macro

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