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/freebsd/sys/contrib/device-tree/include/dt-bindings/clock/
H A Dqcom,dispcc-qcm2290.h21 #define DISP_CC_MDSS_MDP_LUT_CLK 11 macro
H A Dqcom,sm6115-dispcc.h22 #define DISP_CC_MDSS_MDP_LUT_CLK 12 macro
H A Dqcom,dispcc-sm6125.h28 #define DISP_CC_MDSS_MDP_LUT_CLK 19 macro
H A Dqcom,sm6375-dispcc.h22 #define DISP_CC_MDSS_MDP_LUT_CLK 11 macro
H A Dqcom,dispcc-sc7180.h31 #define DISP_CC_MDSS_MDP_LUT_CLK 22 macro
H A Dqcom,dispcc-sm6350.h32 #define DISP_CC_MDSS_MDP_LUT_CLK 21 macro
H A Dqcom,sm4450-dispcc.h23 #define DISP_CC_MDSS_MDP_LUT_CLK 13 macro
H A Dqcom,dispcc-sc7280.h39 #define DISP_CC_MDSS_MDP_LUT_CLK 29 macro
H A Dqcom,dispcc-sdm845.h24 #define DISP_CC_MDSS_MDP_LUT_CLK 14 macro
H A Dqcom,dispcc-sm8150.h44 #define DISP_CC_MDSS_MDP_LUT_CLK 34 macro
H A Dqcom,dispcc-sm8250.h44 #define DISP_CC_MDSS_MDP_LUT_CLK 34 macro
H A Dqcom,dispcc-sm8350.h44 #define DISP_CC_MDSS_MDP_LUT_CLK 34 macro
H A Dqcom,x1e80100-dispcc.h71 #define DISP_CC_MDSS_MDP_LUT_CLK 61 macro
H A Dqcom,dispcc-sc8280xp.h73 #define DISP_CC_MDSS_MDP_LUT_CLK 63 macro
H A Dqcom,sm8450-dispcc.h73 #define DISP_CC_MDSS_MDP_LUT_CLK 63 macro
H A Dqcom,sm8550-dispcc.h74 #define DISP_CC_MDSS_MDP_LUT_CLK 64 macro
H A Dqcom,sm8650-dispcc.h74 #define DISP_CC_MDSS_MDP_LUT_CLK 64 macro
/freebsd/sys/contrib/device-tree/Bindings/display/msm/
H A Dqcom,qcm2290-dpu.yaml68 <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
H A Dqcom,sm6115-dpu.yaml70 <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
H A Dqcom,sc7280-dpu.yaml71 <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
H A Dqcom,sc7180-dpu.yaml95 <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
H A Dqcom,sc8280xp-dpu.yaml68 <&dispcc0 DISP_CC_MDSS_MDP_LUT_CLK>,
H A Dqcom,sm8350-dpu.yaml65 <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
H A Dqcom,sm8550-dpu.yaml71 <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
H A Dqcom,sm8450-dpu.yaml72 <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,

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