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/freebsd/sys/contrib/device-tree/include/dt-bindings/clock/
H A Dqcom,dispcc-qcm2290.h17 #define DISP_CC_MDSS_ESC0_CLK 7 macro
H A Dqcom,sm6115-dispcc.h18 #define DISP_CC_MDSS_ESC0_CLK 8 macro
H A Dqcom,dispcc-sm6125.h24 #define DISP_CC_MDSS_ESC0_CLK 15 macro
H A Dqcom,sm6375-dispcc.h18 #define DISP_CC_MDSS_ESC0_CLK 7 macro
H A Dqcom,dispcc-sc7180.h27 #define DISP_CC_MDSS_ESC0_CLK 18 macro
H A Dqcom,dispcc-sm6350.h28 #define DISP_CC_MDSS_ESC0_CLK 17 macro
H A Dqcom,sm4450-dispcc.h17 #define DISP_CC_MDSS_ESC0_CLK 7 macro
H A Dqcom,dispcc-sc7280.h35 #define DISP_CC_MDSS_ESC0_CLK 25 macro
H A Dqcom,dispcc-sdm845.h18 #define DISP_CC_MDSS_ESC0_CLK 8 macro
H A Dqcom,dispcc-sm8150.h38 #define DISP_CC_MDSS_ESC0_CLK 28 macro
H A Dqcom,dispcc-sm8250.h38 #define DISP_CC_MDSS_ESC0_CLK 28 macro
H A Dqcom,dispcc-sm8350.h38 #define DISP_CC_MDSS_ESC0_CLK 28 macro
H A Dqcom,x1e80100-dispcc.h63 #define DISP_CC_MDSS_ESC0_CLK 53 macro
H A Dqcom,dispcc-sc8280xp.h65 #define DISP_CC_MDSS_ESC0_CLK 55 macro
H A Dqcom,sm8450-dispcc.h65 #define DISP_CC_MDSS_ESC0_CLK 55 macro
H A Dqcom,sm8550-dispcc.h66 #define DISP_CC_MDSS_ESC0_CLK 56 macro
H A Dqcom,sm8650-dispcc.h66 #define DISP_CC_MDSS_ESC0_CLK 56 macro
/freebsd/sys/contrib/device-tree/Bindings/display/msm/
H A Dqcom,qcm2290-mdss.yaml158 <&dispcc DISP_CC_MDSS_ESC0_CLK>,
H A Dqcom,sm6115-mdss.yaml149 <&dispcc DISP_CC_MDSS_ESC0_CLK>,
H A Dqcom,sm6375-mdss.yaml159 <&dispcc DISP_CC_MDSS_ESC0_CLK>,
H A Dqcom,sm8350-mdss.yaml198 <&dispcc DISP_CC_MDSS_ESC0_CLK>,
H A Dqcom,sm6350-mdss.yaml167 <&dispcc DISP_CC_MDSS_ESC0_CLK>,
H A Dqcom,sdm845-mdss.yaml159 <&dispcc DISP_CC_MDSS_ESC0_CLK>,
H A Dqcom,sc7180-mdss.yaml173 <&dispcc DISP_CC_MDSS_ESC0_CLK>,
H A Dqcom,sm8250-mdss.yaml200 <&dispcc DISP_CC_MDSS_ESC0_CLK>,

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