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Searched full:disp_cc_mdss_byte1_clk_src (Results 1 – 25 of 25) sorted by relevance

/linux/drivers/clk/qcom/
H A Ddispcc-sdm845.c124 static struct clk_rcg2 disp_cc_mdss_byte1_clk_src = { variable
130 .name = "disp_cc_mdss_byte1_clk_src",
431 &disp_cc_mdss_byte1_clk_src.clkr.hw,
449 &disp_cc_mdss_byte1_clk_src.clkr.hw,
780 [DISP_CC_MDSS_BYTE1_CLK_SRC] = &disp_cc_mdss_byte1_clk_src.clkr,
H A Ddispcc-sm8250.c245 static struct clk_rcg2 disp_cc_mdss_byte1_clk_src = { variable
251 .name = "disp_cc_mdss_byte1_clk_src",
661 &disp_cc_mdss_byte1_clk_src.clkr.hw,
759 &disp_cc_mdss_byte1_clk_src.clkr.hw,
1166 [DISP_CC_MDSS_BYTE1_CLK_SRC] = &disp_cc_mdss_byte1_clk_src.clkr,
1300 &disp_cc_mdss_byte1_clk_src, in disp_cc_sm8250_probe()
H A Ddispcc-x1e80100.c288 static struct clk_rcg2 disp_cc_mdss_byte1_clk_src = { variable
295 .name = "disp_cc_mdss_byte1_clk_src",
689 &disp_cc_mdss_byte1_clk_src.clkr.hw,
856 &disp_cc_mdss_byte1_clk_src.clkr.hw,
1547 [DISP_CC_MDSS_BYTE1_CLK_SRC] = &disp_cc_mdss_byte1_clk_src.clkr,
H A Ddispcc-sm8550.c318 static struct clk_rcg2 disp_cc_mdss_byte1_clk_src = { variable
325 .name = "disp_cc_mdss_byte1_clk_src",
732 &disp_cc_mdss_byte1_clk_src.clkr.hw,
898 &disp_cc_mdss_byte1_clk_src.clkr.hw,
1655 [DISP_CC_MDSS_BYTE1_CLK_SRC] = &disp_cc_mdss_byte1_clk_src.clkr,
H A Ddispcc-sm8450.c328 static struct clk_rcg2 disp_cc_mdss_byte1_clk_src = { variable
335 .name = "disp_cc_mdss_byte1_clk_src",
746 &disp_cc_mdss_byte1_clk_src.clkr.hw,
894 &disp_cc_mdss_byte1_clk_src.clkr.hw,
1686 [DISP_CC_MDSS_BYTE1_CLK_SRC] = &disp_cc_mdss_byte1_clk_src.clkr,
H A Ddispcc-sc8280xp.c2891 [DISP_CC_MDSS_BYTE1_CLK_SRC] = &disp0_cc_mdss_byte1_clk_src.clkr,
2973 [DISP_CC_MDSS_BYTE1_CLK_SRC] = &disp1_cc_mdss_byte1_clk_src.clkr,
/linux/include/dt-bindings/clock/
H A Dqcom,dispcc-sdm845.h16 #define DISP_CC_MDSS_BYTE1_CLK_SRC 6 macro
H A Dqcom,dispcc-sm8350.h17 #define DISP_CC_MDSS_BYTE1_CLK_SRC 7 macro
H A Dqcom,dispcc-sm8250.h17 #define DISP_CC_MDSS_BYTE1_CLK_SRC 7 macro
H A Dqcom,dispcc-sm8150.h17 #define DISP_CC_MDSS_BYTE1_CLK_SRC 7 macro
H A Dqcom,x1e80100-dispcc.h19 #define DISP_CC_MDSS_BYTE1_CLK_SRC 9 macro
H A Dqcom,sm8550-dispcc.h19 #define DISP_CC_MDSS_BYTE1_CLK_SRC 9 macro
H A Dqcom,sm8450-dispcc.h18 #define DISP_CC_MDSS_BYTE1_CLK_SRC 8 macro
H A Dqcom,dispcc-sc8280xp.h22 #define DISP_CC_MDSS_BYTE1_CLK_SRC 12 macro
/linux/Documentation/devicetree/bindings/display/msm/
H A Dqcom,sdm670-mdss.yaml242 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>,
H A Dqcom,sdm845-mdss.yaml238 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>,
H A Dqcom,sm8250-mdss.yaml300 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>,
H A Dqcom,sm8550-mdss.yaml300 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>,
H A Dqcom,sm8150-mdss.yaml297 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>,
H A Dqcom,sm8450-mdss.yaml314 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>,
/linux/arch/arm64/boot/dts/qcom/
H A Dsm8350.dtsi2811 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>,
H A Dsm8150.dtsi4071 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>,
H A Dsm8550.dtsi3164 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>,
H A Dsm8650.dtsi3675 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>,
H A Dsm8250.dtsi4952 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;