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Searched full:disp_cc_mdss_byte1_clk (Results 1 – 25 of 25) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dqcom,dispcc-sdm845.h15 #define DISP_CC_MDSS_BYTE1_CLK 5 macro
H A Dqcom,dispcc-sm8350.h16 #define DISP_CC_MDSS_BYTE1_CLK 6 macro
H A Dqcom,dispcc-sm8250.h16 #define DISP_CC_MDSS_BYTE1_CLK 6 macro
H A Dqcom,dispcc-sm8150.h16 #define DISP_CC_MDSS_BYTE1_CLK 6 macro
H A Dqcom,x1e80100-dispcc.h18 #define DISP_CC_MDSS_BYTE1_CLK 8 macro
H A Dqcom,sm8550-dispcc.h18 #define DISP_CC_MDSS_BYTE1_CLK 8 macro
H A Dqcom,sm8450-dispcc.h17 #define DISP_CC_MDSS_BYTE1_CLK 7 macro
H A Dqcom,dispcc-sc8280xp.h21 #define DISP_CC_MDSS_BYTE1_CLK 11 macro
/linux/drivers/clk/qcom/
H A Ddispcc-sdm845.c422 static struct clk_branch disp_cc_mdss_byte1_clk = { variable
429 .name = "disp_cc_mdss_byte1_clk",
779 [DISP_CC_MDSS_BYTE1_CLK] = &disp_cc_mdss_byte1_clk.clkr,
H A Ddispcc-sm8250.c750 static struct clk_branch disp_cc_mdss_byte1_clk = { variable
757 .name = "disp_cc_mdss_byte1_clk",
1165 [DISP_CC_MDSS_BYTE1_CLK] = &disp_cc_mdss_byte1_clk.clkr,
H A Ddispcc-x1e80100.c847 static struct clk_branch disp_cc_mdss_byte1_clk = { variable
854 .name = "disp_cc_mdss_byte1_clk",
1546 [DISP_CC_MDSS_BYTE1_CLK] = &disp_cc_mdss_byte1_clk.clkr,
H A Ddispcc-sm8550.c889 static struct clk_branch disp_cc_mdss_byte1_clk = { variable
896 .name = "disp_cc_mdss_byte1_clk",
1654 [DISP_CC_MDSS_BYTE1_CLK] = &disp_cc_mdss_byte1_clk.clkr,
H A Ddispcc-sm8450.c885 static struct clk_branch disp_cc_mdss_byte1_clk = { variable
892 .name = "disp_cc_mdss_byte1_clk",
1685 [DISP_CC_MDSS_BYTE1_CLK] = &disp_cc_mdss_byte1_clk.clkr,
H A Ddispcc-sc8280xp.c2890 [DISP_CC_MDSS_BYTE1_CLK] = &disp0_cc_mdss_byte1_clk.clkr,
2972 [DISP_CC_MDSS_BYTE1_CLK] = &disp1_cc_mdss_byte1_clk.clkr,
/linux/Documentation/devicetree/bindings/display/msm/
H A Dqcom,sdm670-mdss.yaml230 clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>,
H A Dqcom,sdm845-mdss.yaml226 clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>,
H A Dqcom,sm8250-mdss.yaml287 clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>,
H A Dqcom,sm8550-mdss.yaml287 clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>,
H A Dqcom,sm8150-mdss.yaml284 clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>,
H A Dqcom,sm8450-mdss.yaml301 clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>,
/linux/arch/arm64/boot/dts/qcom/
H A Dsm8350.dtsi2798 clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>,
H A Dsm8150.dtsi4058 clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>,
H A Dsm8550.dtsi3149 clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>,
H A Dsm8650.dtsi3662 clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>,
H A Dsm8250.dtsi4939 clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>,