| /linux/drivers/clk/qcom/ |
| H A D | dispcc-qcm2290.c | 304 static struct clk_branch disp_cc_mdss_byte0_intf_clk = { variable
311 .name = "disp_cc_mdss_byte0_intf_clk",
471 [DISP_CC_MDSS_BYTE0_INTF_CLK] = &disp_cc_mdss_byte0_intf_clk.clkr,
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| H A D | dispcc-sm6375.c | 299 static struct clk_branch disp_cc_mdss_byte0_intf_clk = { variable
306 .name = "disp_cc_mdss_byte0_intf_clk",
523 [DISP_CC_MDSS_BYTE0_INTF_CLK] = &disp_cc_mdss_byte0_intf_clk.clkr,
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| H A D | dispcc-sm6115.c | 353 static struct clk_branch disp_cc_mdss_byte0_intf_clk = { variable
360 .name = "disp_cc_mdss_byte0_intf_clk",
536 [DISP_CC_MDSS_BYTE0_INTF_CLK] = &disp_cc_mdss_byte0_intf_clk.clkr,
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| H A D | dispcc-sm6125.c | 362 static struct clk_branch disp_cc_mdss_byte0_intf_clk = { variable
369 .name = "disp_cc_mdss_byte0_intf_clk",
623 [DISP_CC_MDSS_BYTE0_INTF_CLK] = &disp_cc_mdss_byte0_intf_clk.clkr,
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| H A D | dispcc-sc7180.c | 376 static struct clk_branch disp_cc_mdss_byte0_intf_clk = { variable
383 .name = "disp_cc_mdss_byte0_intf_clk",
648 [DISP_CC_MDSS_BYTE0_INTF_CLK] = &disp_cc_mdss_byte0_intf_clk.clkr,
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| H A D | dispcc-sm6350.c | 385 static struct clk_branch disp_cc_mdss_byte0_intf_clk = { variable
392 .name = "disp_cc_mdss_byte0_intf_clk",
697 [DISP_CC_MDSS_BYTE0_INTF_CLK] = &disp_cc_mdss_byte0_intf_clk.clkr,
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| H A D | dispcc-sm4450.c | 398 static struct clk_branch disp_cc_mdss_byte0_intf_clk = { variable
405 .name = "disp_cc_mdss_byte0_intf_clk",
681 [DISP_CC_MDSS_BYTE0_INTF_CLK] = &disp_cc_mdss_byte0_intf_clk.clkr,
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| H A D | dispcc-sc7280.c | 433 static struct clk_branch disp_cc_mdss_byte0_intf_clk = { variable
440 .name = "disp_cc_mdss_byte0_intf_clk",
806 [DISP_CC_MDSS_BYTE0_INTF_CLK] = &disp_cc_mdss_byte0_intf_clk.clkr,
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| H A D | dispcc-sdm845.c | 403 static struct clk_branch disp_cc_mdss_byte0_intf_clk = { variable
410 .name = "disp_cc_mdss_byte0_intf_clk",
776 [DISP_CC_MDSS_BYTE0_INTF_CLK] = &disp_cc_mdss_byte0_intf_clk.clkr,
|
| /linux/include/dt-bindings/clock/ |
| H A D | qcom,sm6115-dispcc.h | 17 #define DISP_CC_MDSS_BYTE0_INTF_CLK 7 macro
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| H A D | qcom,dispcc-qcm2290.h | 16 #define DISP_CC_MDSS_BYTE0_INTF_CLK 6 macro
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| H A D | qcom,sm6375-dispcc.h | 17 #define DISP_CC_MDSS_BYTE0_INTF_CLK 6 macro
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| H A D | qcom,dispcc-sm6125.h | 14 #define DISP_CC_MDSS_BYTE0_INTF_CLK 5 macro
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| H A D | qcom,dispcc-sc7180.h | 16 #define DISP_CC_MDSS_BYTE0_INTF_CLK 7 macro
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| H A D | qcom,dispcc-sm6350.h | 17 #define DISP_CC_MDSS_BYTE0_INTF_CLK 6 macro
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| H A D | qcom,sm4450-dispcc.h | 16 #define DISP_CC_MDSS_BYTE0_INTF_CLK 6 macro
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| H A D | qcom,dispcc-sc7280.h | 16 #define DISP_CC_MDSS_BYTE0_INTF_CLK 6 macro
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| H A D | qcom,dispcc-sdm845.h | 14 #define DISP_CC_MDSS_BYTE0_INTF_CLK 4 macro
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| H A D | qcom,dispcc-sm8350.h | 15 #define DISP_CC_MDSS_BYTE0_INTF_CLK 5 macro
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| H A D | qcom,dispcc-sm8250.h | 15 #define DISP_CC_MDSS_BYTE0_INTF_CLK 5 macro
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| H A D | qcom,dispcc-sm8150.h | 15 #define DISP_CC_MDSS_BYTE0_INTF_CLK 5 macro
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| H A D | qcom,x1e80100-dispcc.h | 17 #define DISP_CC_MDSS_BYTE0_INTF_CLK 7 macro
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| H A D | qcom,sm8550-dispcc.h | 17 #define DISP_CC_MDSS_BYTE0_INTF_CLK 7 macro
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| H A D | qcom,sm8450-dispcc.h | 16 #define DISP_CC_MDSS_BYTE0_INTF_CLK 6 macro
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| H A D | qcom,dispcc-sc8280xp.h | 20 #define DISP_CC_MDSS_BYTE0_INTF_CLK 10 macro
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