| /linux/drivers/clk/qcom/ |
| H A D | dispcc-sm6375.c | 281 static struct clk_branch disp_cc_mdss_byte0_clk = { variable
288 .name = "disp_cc_mdss_byte0_clk",
520 [DISP_CC_MDSS_BYTE0_CLK] = &disp_cc_mdss_byte0_clk.clkr,
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| H A D | dispcc-sm6125.c | 344 static struct clk_branch disp_cc_mdss_byte0_clk = { variable
351 .name = "disp_cc_mdss_byte0_clk",
621 [DISP_CC_MDSS_BYTE0_CLK] = &disp_cc_mdss_byte0_clk.clkr,
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| H A D | dispcc-sc7180.c | 330 static struct clk_branch disp_cc_mdss_byte0_clk = { variable
337 .name = "disp_cc_mdss_byte0_clk",
645 [DISP_CC_MDSS_BYTE0_CLK] = &disp_cc_mdss_byte0_clk.clkr,
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| H A D | dispcc-sm4450.c | 380 static struct clk_branch disp_cc_mdss_byte0_clk = { variable
387 .name = "disp_cc_mdss_byte0_clk",
678 [DISP_CC_MDSS_BYTE0_CLK] = &disp_cc_mdss_byte0_clk.clkr,
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| H A D | dispcc-sc7280.c | 415 static struct clk_branch disp_cc_mdss_byte0_clk = { variable
422 .name = "disp_cc_mdss_byte0_clk",
803 [DISP_CC_MDSS_BYTE0_CLK] = &disp_cc_mdss_byte0_clk.clkr,
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| H A D | dispcc-sdm845.c | 367 static struct clk_branch disp_cc_mdss_byte0_clk = { variable
374 .name = "disp_cc_mdss_byte0_clk",
774 [DISP_CC_MDSS_BYTE0_CLK] = &disp_cc_mdss_byte0_clk.clkr,
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| /linux/include/dt-bindings/clock/ |
| H A D | qcom,sm6115-dispcc.h | 14 #define DISP_CC_MDSS_BYTE0_CLK 4 macro
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| H A D | qcom,dispcc-qcm2290.h | 13 #define DISP_CC_MDSS_BYTE0_CLK 3 macro
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| H A D | qcom,sm6375-dispcc.h | 14 #define DISP_CC_MDSS_BYTE0_CLK 3 macro
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| H A D | qcom,dispcc-sm6125.h | 12 #define DISP_CC_MDSS_BYTE0_CLK 3 macro
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| H A D | qcom,dispcc-sc7180.h | 13 #define DISP_CC_MDSS_BYTE0_CLK 4 macro
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| H A D | qcom,dispcc-sm6350.h | 14 #define DISP_CC_MDSS_BYTE0_CLK 3 macro
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| H A D | qcom,sm4450-dispcc.h | 13 #define DISP_CC_MDSS_BYTE0_CLK 3 macro
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| H A D | qcom,dispcc-sc7280.h | 13 #define DISP_CC_MDSS_BYTE0_CLK 3 macro
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| H A D | qcom,dispcc-sdm845.h | 12 #define DISP_CC_MDSS_BYTE0_CLK 2 macro
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| H A D | qcom,dispcc-sm8350.h | 12 #define DISP_CC_MDSS_BYTE0_CLK 2 macro
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| H A D | qcom,dispcc-sm8250.h | 12 #define DISP_CC_MDSS_BYTE0_CLK 2 macro
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| H A D | qcom,dispcc-sm8150.h | 12 #define DISP_CC_MDSS_BYTE0_CLK 2 macro
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| H A D | qcom,x1e80100-dispcc.h | 14 #define DISP_CC_MDSS_BYTE0_CLK 4 macro
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| H A D | qcom,sm8550-dispcc.h | 14 #define DISP_CC_MDSS_BYTE0_CLK 4 macro
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| H A D | qcom,sm8450-dispcc.h | 13 #define DISP_CC_MDSS_BYTE0_CLK 3 macro
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| H A D | qcom,dispcc-sc8280xp.h | 17 #define DISP_CC_MDSS_BYTE0_CLK 7 macro
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| /linux/Documentation/devicetree/bindings/display/msm/ |
| H A D | qcom,qcm2290-mdss.yaml | 155 clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
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| H A D | qcom,sm6125-mdss.yaml | 158 clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
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| H A D | qcom,sm6115-mdss.yaml | 146 clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
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