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/linux/arch/m68k/ifpsp060/
H A Dpfpsp.sa1 dc.l $60ff0000,$17400000,$60ff0000,$15f40000
2 dc.l $60ff0000,$02b60000,$60ff0000,$04700000
3 dc.l $60ff0000,$1b100000,$60ff0000,$19aa0000
4 dc.l $60ff0000,$1b5a0000,$60ff0000,$062e0000
5 dc.l $60ff0000,$102c0000,$51fc51fc,$51fc51fc
6 dc.l $51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
7 dc.l $51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
8 dc.l $51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
9 dc.l $2f00203a,$ff2c487b,$0930ffff,$fef8202f
10 dc.l $00044e74,$00042f00,$203afef2,$487b0930
[all …]
H A Dfplsp.sa1 dc.l $60ff0000,$238e0000,$60ff0000,$24200000
2 dc.l $60ff0000,$24b60000,$60ff0000,$11060000
3 dc.l $60ff0000,$11980000,$60ff0000,$122e0000
4 dc.l $60ff0000,$0f160000,$60ff0000,$0fa80000
5 dc.l $60ff0000,$103e0000,$60ff0000,$12ae0000
6 dc.l $60ff0000,$13400000,$60ff0000,$13d60000
7 dc.l $60ff0000,$05ae0000,$60ff0000,$06400000
8 dc.l $60ff0000,$06d60000,$60ff0000,$213e0000
9 dc.l $60ff0000,$21d00000,$60ff0000,$22660000
10 dc.l $60ff0000,$16160000,$60ff0000,$16a80000
[all …]
H A Ditest.sa1 dc.l $60ff0000,$005c5465,$7374696e,$67203638
2 dc.l $30363020,$49535020,$73746172,$7465643a
3 dc.l $0a007061,$73736564,$0a002066,$61696c65
4 dc.l $640a0000,$4a80660e,$487affe8,$61ff0000
5 dc.l $4f9a588f,$4e752f01,$61ff0000,$4fa4588f
6 dc.l $487affd8,$61ff0000,$4f82588f,$4e754e56
7 dc.l $ff6048e7,$3f3c487a,$ff9e61ff,$00004f6c
8 dc.l $588f42ae,$ff78487b,$01700000,$00ea61ff
9 dc.l $00004f58,$588f61ff,$000000f0,$61ffffff
10 dc.l $ffa642ae,$ff78487b,$01700000,$0af661ff
[all …]
H A Dftest.sa1 dc.l $60ff0000,$00d40000,$60ff0000,$016c0000
2 dc.l $60ff0000,$01a80000,$54657374,$696e6720
3 dc.l $36383036,$30204650,$53502073,$74617274
4 dc.l $65643a0a,$00546573,$74696e67,$20363830
5 dc.l $36302046,$50535020,$756e696d,$706c656d
6 dc.l $656e7465,$6420696e,$73747275,$6374696f
7 dc.l $6e207374,$61727465,$643a0a00,$54657374
8 dc.l $696e6720,$36383036,$30204650,$53502065
9 dc.l $78636570,$74696f6e,$20656e61,$626c6564
10 dc.l $20737461,$72746564,$3a0a0070,$61737365
[all …]
H A Dilsp.sa1 dc.l $60ff0000,$01fe0000,$60ff0000,$02080000
2 dc.l $60ff0000,$04900000,$60ff0000,$04080000
3 dc.l $60ff0000,$051e0000,$60ff0000,$053c0000
4 dc.l $60ff0000,$055a0000,$60ff0000,$05740000
5 dc.l $60ff0000,$05940000,$60ff0000,$05b40000
6 dc.l $51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
7 dc.l $51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
8 dc.l $51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
9 dc.l $51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
10 dc.l $51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
[all …]
/linux/drivers/dma/
H A Dtxx9dmac.c24 static struct txx9dmac_cregs __iomem *__dma_regs(const struct txx9dmac_chan *dc) in __dma_regs() argument
26 return dc->ch_regs; in __dma_regs()
30 const struct txx9dmac_chan *dc) in __dma_regs32() argument
32 return dc->ch_regs; in __dma_regs32()
35 #define channel64_readq(dc, name) \ argument
36 __raw_readq(&(__dma_regs(dc)->name))
37 #define channel64_writeq(dc, name, val) \ argument
38 __raw_writeq((val), &(__dma_regs(dc)->name))
39 #define channel64_readl(dc, name) \ argument
40 __raw_readl(&(__dma_regs(dc)->name))
[all …]
/linux/drivers/tty/
H A Dnozomi.c315 struct nozomi *dc; member
463 static void nozomi_setup_memory(struct nozomi *dc) in nozomi_setup_memory() argument
465 void __iomem *offset = dc->base_addr + dc->config_table.dl_start; in nozomi_setup_memory()
472 dc->port[PORT_MDM].dl_addr[CH_A] = offset; in nozomi_setup_memory()
473 dc->port[PORT_MDM].dl_addr[CH_B] = in nozomi_setup_memory()
474 (offset += dc->config_table.dl_mdm_len1); in nozomi_setup_memory()
475 dc->port[PORT_MDM].dl_size[CH_A] = in nozomi_setup_memory()
476 dc->config_table.dl_mdm_len1 - buff_offset; in nozomi_setup_memory()
477 dc->port[PORT_MDM].dl_size[CH_B] = in nozomi_setup_memory()
478 dc->config_table.dl_mdm_len2 - buff_offset; in nozomi_setup_memory()
[all …]
/linux/drivers/md/
H A Ddm-delay.c59 struct delay_c *dc = timer_container_of(dc, t, delay_timer); in handle_delayed_timer() local
61 queue_work(dc->kdelayd_wq, &dc->flush_expired_bios); in handle_delayed_timer()
64 static void queue_timeout(struct delay_c *dc, unsigned long expires) in queue_timeout() argument
66 timer_reduce(&dc->delay_timer, expires); in queue_timeout()
69 static inline bool delay_is_fast(struct delay_c *dc) in delay_is_fast() argument
71 return !!dc->worker; in delay_is_fast()
86 static void flush_delayed_bios(struct delay_c *dc, bool flush_all) in flush_delayed_bios() argument
95 mutex_lock(&dc->process_bios_lock); in flush_delayed_bios()
96 spin_lock(&dc->delayed_bios_lock); in flush_delayed_bios()
97 list_replace_init(&dc->delayed_bios, &local_list); in flush_delayed_bios()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/core/
H A Ddc.c29 #include "dc.h"
95 dc->ctx
98 dc->ctx->logger
105 * DC is the OS-agnostic component of the amdgpu DC driver.
107 * DC maintains and validates a set of structs representing the state of the
110 * Main DC HW structs:
112 * struct dc - The central struct. One per driver. Created on driver load,
116 * Used as a backpointer by most other structs in dc.
129 * Main dc state structs:
132 * these structs in dc->current_state representing the currently programmed state.
[all …]
/linux/drivers/scsi/esas2r/
H A Desas2r_disc.c291 struct esas2r_disc_context *dc = &a->disc_ctx; in esas2r_disc_queue_event() local
298 dc->disc_evt |= disc_evt; in esas2r_disc_queue_event()
314 struct esas2r_disc_context *dc = &a->disc_ctx; in esas2r_disc_start_port() local
326 if (dc->disc_evt) { in esas2r_disc_start_port()
352 esas2r_trace("disc_evt: %d", dc->disc_evt); in esas2r_disc_start_port()
354 dc->flags = 0; in esas2r_disc_start_port()
357 dc->flags |= DCF_POLLED; in esas2r_disc_start_port()
359 rq->interrupt_cx = dc; in esas2r_disc_start_port()
363 if (dc->disc_evt & DCDE_DEV_SCAN) { in esas2r_disc_start_port()
364 dc->disc_evt &= ~DCDE_DEV_SCAN; in esas2r_disc_start_port()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn42b/
H A Ddcn42b_resource.c8 #include "dc.h"
892 ctx->dc->caps.extended_aux_timeout_support); in dcn42b_aux_engine_create()
1642 struct dc *dc = pool->base.oem_device->ctx->dc; in dcn42b_resource_destruct() local
1644 dc->link_srv->destroy_ddc_service(&pool->base.oem_device); in dcn42b_resource_destruct()
1660 if (!pipe_ctx->stream->ctx->dc->config.unify_link_enc_assignment) in dcn42b_build_pipe_pix_clk_params()
1699 …if (pixel_clk_params->requested_pix_clk_100hz > (uint32_t)(4 * stream->ctx->dc->clk_mgr->dprefclk_… in dcn42b_build_pipe_pix_clk_params()
1701 …} else if (pixel_clk_params->requested_pix_clk_100hz > (uint32_t)(2 * stream->ctx->dc->clk_mgr->dp… in dcn42b_build_pipe_pix_clk_params()
1703 …} else if (pixel_clk_params->requested_pix_clk_100hz > (uint32_t)(stream->ctx->dc->clk_mgr->dprefc… in dcn42b_build_pipe_pix_clk_params()
1720 dm_error("DC: failed to create dwbc42!\n"); in dcn42b_dwbc_create()
1744 ctx->dc->debug.enable_fine_grain_clock_gating.bits.mmhubbub); in dcn42b_mmhubbub_init()
[all …]
/linux/drivers/clk/mvebu/
H A Ddove-divider.c51 static unsigned int dove_get_divider(struct dove_clk *dc) in dove_get_divider() argument
56 val = readl_relaxed(dc->base + DIV_CTRL0); in dove_get_divider()
57 val >>= dc->div_bit_start; in dove_get_divider()
59 divider = val & ~(~0 << dc->div_bit_size); in dove_get_divider()
61 if (dc->divider_table) in dove_get_divider()
62 divider = dc->divider_table[divider]; in dove_get_divider()
67 static int dove_calc_divider(const struct dove_clk *dc, unsigned long rate, in dove_calc_divider() argument
74 if (dc->divider_table) { in dove_calc_divider()
77 for (i = 0; dc->divider_table[i]; i++) in dove_calc_divider()
78 if (divider == dc->divider_table[i]) { in dove_calc_divider()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn401/
H A Ddcn401_resource.c6 #include "dc.h"
835 ctx->dc->caps.extended_aux_timeout_support); in dcn401_aux_engine_create()
1449 static unsigned int dcn401_calc_num_avail_chans_for_mall(struct dc *dc, unsigned int num_chans) in dcn401_calc_num_avail_chans_for_mall() argument
1463 if (ASICREV_IS_GC_12_0_0_A0(dc->ctx->asic_id.hw_internal_rev)) { in dcn401_calc_num_avail_chans_for_mall()
1465 } else if (ASICREV_IS_GC_12_0_1_A0(dc->ctx->asic_id.hw_internal_rev)) { in dcn401_calc_num_avail_chans_for_mall()
1673 struct dc *dc = pool->base.oem_device->ctx->dc; in dcn401_resource_destruct() local
1675 dc->link_srv->destroy_ddc_service(&pool->base.oem_device); in dcn401_resource_destruct()
1689 dm_error("DC: failed to create dwbc401!\n"); in dcn401_dwbc_create()
1719 dm_error("DC: failed to create mcif_wb30!\n"); in dcn401_mmhubbub_create()
1758 ctx->dc->debug.enable_fine_grain_clock_gating.bits.dsc); in dcn401_dsc_create()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddcn20_fpu.h31 void dcn20_populate_dml_writeback_from_context(struct dc *dc,
39 void dcn20_calculate_dlg_params(struct dc *dc,
44 int dcn20_populate_dml_pipes_from_context(struct dc *dc,
48 void dcn20_calculate_wm(struct dc *dc,
57 void dcn20_update_bounding_box(struct dc *dc,
62 void dcn20_patch_bounding_box(struct dc *dc,
64 bool dcn20_validate_bandwidth_fp(struct dc *dc, struct dc_state *context,
75 int dcn21_populate_dml_pipes_from_context(struct dc *dc,
79 bool dcn21_validate_bandwidth_fp(struct dc *dc, struct dc_state *context, enum
81 void dcn21_update_bw_bounding_box_fpu(struct dc *dc, struct clk_bw_params *bw_params);
[all …]
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn42/
H A Ddcn42_resource.c6 #include "dc.h"
839 ctx->dc->caps.extended_aux_timeout_support); in dcn42_aux_engine_create()
1653 struct dc *dc = pool->base.oem_device->ctx->dc; in dcn42_resource_destruct() local
1655 dc->link_srv->destroy_ddc_service(&pool->base.oem_device); in dcn42_resource_destruct()
1671 if (!pipe_ctx->stream->ctx->dc->config.unify_link_enc_assignment) in dcn42_build_pipe_pix_clk_params()
1710 …if (pixel_clk_params->requested_pix_clk_100hz > (uint32_t)(4 * stream->ctx->dc->clk_mgr->dprefclk_… in dcn42_build_pipe_pix_clk_params()
1712 …} else if (pixel_clk_params->requested_pix_clk_100hz > (uint32_t)(2 * stream->ctx->dc->clk_mgr->dp… in dcn42_build_pipe_pix_clk_params()
1714 …} else if (pixel_clk_params->requested_pix_clk_100hz > (uint32_t)(stream->ctx->dc->clk_mgr->dprefc… in dcn42_build_pipe_pix_clk_params()
1731 dm_error("DC: failed to create dwbc42!\n"); in dcn42_dwbc_create()
1755 ctx->dc->debug.enable_fine_grain_clock_gating.bits.mmhubbub); in dcn42_mmhubbub_init()
[all …]
/linux/drivers/gpu/drm/amd/display/amdgpu_dm/tests/
H A Damdgpu_dm_irq_test.c13 #include "dc.h"
99 * Allocate a refcounted dc_sink for tests without pulling in the DC-core
277 static struct dc *dm_test_alloc_dc_with_irq_service(struct kunit *test, in dm_test_alloc_dc_with_irq_service()
283 struct dc *dc; in dm_test_alloc_dc_with_irq_service() local
286 dc = dm_kunit_alloc_dc_with_ctx(test); in dm_test_alloc_dc_with_irq_service()
305 dc->res_pool = res_pool; in dm_test_alloc_dc_with_irq_service()
307 return dc; in dm_test_alloc_dc_with_irq_service()
1231 * skipped, so suspend must complete without touching the (absent) DC. in dm_test_irq_suspend_empty()
1283 * no DC) and flush_work() on the registered handler.
1423 struct dc *dc; in dm_test_hpd_rx_irq_create_workqueue() local
[all …]
/linux/drivers/md/bcache/
H A Dwriteback.h78 static inline bool bcache_dev_stripe_dirty(struct cached_dev *dc, in bcache_dev_stripe_dirty() argument
82 int stripe = offset_to_stripe(&dc->disk, offset); in bcache_dev_stripe_dirty()
88 if (atomic_read(dc->disk.stripe_sectors_dirty + stripe)) in bcache_dev_stripe_dirty()
91 if (nr_sectors <= dc->disk.stripe_size) in bcache_dev_stripe_dirty()
94 nr_sectors -= dc->disk.stripe_size; in bcache_dev_stripe_dirty()
102 static inline bool should_writeback(struct cached_dev *dc, struct bio *bio, in should_writeback() argument
105 unsigned int in_use = dc->disk.c->gc_stats.in_use; in should_writeback()
108 test_bit(BCACHE_DEV_DETACHING, &dc->disk.flags) || in should_writeback()
115 if (dc->partial_stripes_expensive && in should_writeback()
116 bcache_dev_stripe_dirty(dc, bio->bi_iter.bi_sector, in should_writeback()
[all …]
H A Dsysfs.c172 struct cached_dev *dc = container_of(kobj, struct cached_dev, in SHOW() local
175 int wb = dc->writeback_running; in SHOW()
177 #define var(stat) (dc->stat) in SHOW()
182 BDEV_CACHE_MODE(&dc->sb)); in SHOW()
187 dc->cache_readahead_policy); in SHOW()
192 dc->stop_when_cache_set_failed); in SHOW()
195 sysfs_printf(data_csum, "%i", dc->disk.data_csum); in SHOW()
204 wb ? atomic_long_read(&dc->writeback_rate.rate) << 9 : 0); in SHOW()
205 sysfs_printf(io_errors, "%i", atomic_read(&dc->io_errors)); in SHOW()
206 sysfs_printf(io_error_limit, "%i", dc->error_limit); in SHOW()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/
H A Ddcn32_resource.c29 #include "dc.h"
829 ctx->dc->caps.extended_aux_timeout_support); in dcn32_aux_engine_create()
946 ctx->dc->dml.ip.det_buffer_size_kbytes, in dcn32_hubbub_create()
947 ctx->dc->dml.ip.pixel_chunk_size_kbytes, in dcn32_hubbub_create()
948 ctx->dc->dml.ip.config_return_buffer_size_in_kbytes); in dcn32_hubbub_create()
1668 struct dc *dc = pool->base.oem_device->ctx->dc; in dcn32_resource_destruct() local
1670 dc->link_srv->destroy_ddc_service(&pool->base.oem_device); in dcn32_resource_destruct()
1684 dm_error("DC: failed to create dwbc30!\n"); in dcn32_dwbc_create()
1712 dm_error("DC: failed to create mcif_wb30!\n"); in dcn32_mmhubbub_create()
1809 static void dcn32_enable_phantom_plane(struct dc *dc, in dcn32_enable_phantom_plane() argument
[all …]
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn321/
H A Ddcn321_resource.c28 #include "dc.h"
817 ctx->dc->caps.extended_aux_timeout_support); in dcn321_aux_engine_create()
934 ctx->dc->dml.ip.det_buffer_size_kbytes, in dcn321_hubbub_create()
935 ctx->dc->dml.ip.pixel_chunk_size_kbytes, in dcn321_hubbub_create()
936 ctx->dc->dml.ip.config_return_buffer_size_in_kbytes); in dcn321_hubbub_create()
1642 struct dc *dc = pool->base.oem_device->ctx->dc; in dcn321_resource_destruct() local
1644 dc->link_srv->destroy_ddc_service(&pool->base.oem_device); in dcn321_resource_destruct()
1658 dm_error("DC: failed to create dwbc30!\n"); in dcn321_dwbc_create()
1686 dm_error("DC: failed to create mcif_wb30!\n"); in dcn321_mmhubbub_create()
1744 static void dcn321_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params) in dcn321_update_bw_bounding_box() argument
[all …]
/linux/drivers/gpu/ipu-v3/
H A Dipu-dc.c90 /* The display interface number assigned to this dc channel */
109 static void dc_link_event(struct ipu_dc *dc, int event, int addr, int priority) in dc_link_event() argument
113 reg = readl(dc->base + DC_RL_CH(event)); in dc_link_event()
116 writel(reg, dc->base + DC_RL_CH(event)); in dc_link_event()
119 static void dc_write_tmpl(struct ipu_dc *dc, int word, u32 opcode, u32 operand, in dc_write_tmpl() argument
122 struct ipu_dc_priv *priv = dc->priv; in dc_write_tmpl()
160 int ipu_dc_init_sync(struct ipu_dc *dc, struct ipu_di *di, bool interlaced, in ipu_dc_init_sync() argument
163 struct ipu_dc_priv *priv = dc->priv; in ipu_dc_init_sync()
168 dc->di = ipu_di_get_num(di); in ipu_dc_init_sync()
179 * per-field VSYNC signals. The pixel active signal synchronising DC in ipu_dc_init_sync()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn303/
H A Ddcn303_resource.c82 dc->ctx->logger
799 dm_error("DC: failed to create dwbc30!\n"); in dcn303_dwbc_create()
834 dm_error("DC: failed to create mcif_wb30!\n"); in dcn303_mmhubbub_create()
874 &aux_engine_regs[inst], &aux_mask, &aux_shift, ctx->dc->caps.extended_aux_timeout_support); in dcn303_aux_engine_create()
1012 static bool is_soc_bounding_box_valid(struct dc *dc) in is_soc_bounding_box_valid() argument
1014 uint32_t hw_internal_rev = dc->ctx->asic_id.hw_internal_rev; in is_soc_bounding_box_valid()
1022 static bool init_soc_bounding_box(struct dc *dc, struct resource_pool *pool) in init_soc_bounding_box() argument
1027 DC_LOGGER_INIT(dc->ctx->logger); in init_soc_bounding_box()
1029 if (!is_soc_bounding_box_valid(dc)) { in init_soc_bounding_box()
1036 loaded_ip->clamp_min_dcfclk = dc->config.clamp_min_dcfclk; in init_soc_bounding_box()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn302/
H A Ddcn302_resource.c83 dc->ctx->logger
838 dm_error("DC: failed to create dwbc30!\n"); in dcn302_dwbc_create()
873 dm_error("DC: failed to create mcif_wb30!\n"); in dcn302_mmhubbub_create()
916 &aux_engine_regs[inst], &aux_mask, &aux_shift, ctx->dc->caps.extended_aux_timeout_support); in dcn302_aux_engine_create()
1067 static bool is_soc_bounding_box_valid(struct dc *dc) in is_soc_bounding_box_valid() argument
1069 uint32_t hw_internal_rev = dc->ctx->asic_id.hw_internal_rev; in is_soc_bounding_box_valid()
1077 static bool init_soc_bounding_box(struct dc *dc, struct resource_pool *pool) in init_soc_bounding_box() argument
1082 DC_LOGGER_INIT(dc->ctx->logger); in init_soc_bounding_box()
1084 if (!is_soc_bounding_box_valid(dc)) { in init_soc_bounding_box()
1091 loaded_ip->clamp_min_dcfclk = dc->config.clamp_min_dcfclk; in init_soc_bounding_box()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn30/
H A Ddcn30_resource.c28 #include "dc.h"
99 dc->ctx->logger
846 ctx->dc->caps.extended_aux_timeout_support); in dcn30_aux_engine_create()
1351 struct dc *dc = pool->base.oem_device->ctx->dc; in dcn30_resource_destruct() local
1353 dc->link_srv->destroy_ddc_service(&pool->base.oem_device); in dcn30_resource_destruct()
1385 dm_error("DC: failed to create dwbc30!\n"); in dcn30_dwbc_create()
1409 dm_error("DC: failed to create mcif_wb30!\n"); in dcn30_mmhubbub_create()
1439 enum dc_status dcn30_add_stream_to_ctx(struct dc *dc, struct dc_state *new_ctx, struct dc_stream_st… in dcn30_add_stream_to_ctx() argument
1442 return dcn20_add_stream_to_ctx(dc, new_ctx, dc_stream); in dcn30_add_stream_to_ctx()
1479 struct dc *dc, struct dc_state *context, in dcn30_populate_dml_pipes_from_context() argument
[all …]
/linux/Documentation/devicetree/bindings/display/tegra/
H A Dnvidia,tegra20-dc.yaml4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-dc.yaml#
15 pattern: "^dc@[0-9a-f]+$"
20 - nvidia,tegra20-dc
21 - nvidia,tegra30-dc
22 - nvidia,tegra114-dc
23 - nvidia,tegra124-dc
24 - nvidia,tegra210-dc
27 - const: nvidia,tegra124-dc
28 - const: nvidia,tegra132-dc
45 - const: dc
[all …]

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