| /linux/arch/m68k/ifpsp060/ |
| H A D | pfpsp.sa | 1 dc.l $60ff0000,$17400000,$60ff0000,$15f40000
2 dc.l $60ff0000,$02b60000,$60ff0000,$04700000
3 dc.l $60ff0000,$1b100000,$60ff0000,$19aa0000
4 dc.l $60ff0000,$1b5a0000,$60ff0000,$062e0000
5 dc.l $60ff0000,$102c0000,$51fc51fc,$51fc51fc
6 dc.l $51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
7 dc.l $51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
8 dc.l $51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
9 dc.l $2f00203a,$ff2c487b,$0930ffff,$fef8202f
10 dc.l $00044e74,$00042f00,$203afef2,$487b0930
[all …]
|
| H A D | fplsp.sa | 1 dc.l $60ff0000,$238e0000,$60ff0000,$24200000
2 dc.l $60ff0000,$24b60000,$60ff0000,$11060000
3 dc.l $60ff0000,$11980000,$60ff0000,$122e0000
4 dc.l $60ff0000,$0f160000,$60ff0000,$0fa80000
5 dc.l $60ff0000,$103e0000,$60ff0000,$12ae0000
6 dc.l $60ff0000,$13400000,$60ff0000,$13d60000
7 dc.l $60ff0000,$05ae0000,$60ff0000,$06400000
8 dc.l $60ff0000,$06d60000,$60ff0000,$213e0000
9 dc.l $60ff0000,$21d00000,$60ff0000,$22660000
10 dc.l $60ff0000,$16160000,$60ff0000,$16a80000
[all …]
|
| H A D | itest.sa | 1 dc.l $60ff0000,$005c5465,$7374696e,$67203638
2 dc.l $30363020,$49535020,$73746172,$7465643a
3 dc.l $0a007061,$73736564,$0a002066,$61696c65
4 dc.l $640a0000,$4a80660e,$487affe8,$61ff0000
5 dc.l $4f9a588f,$4e752f01,$61ff0000,$4fa4588f
6 dc.l $487affd8,$61ff0000,$4f82588f,$4e754e56
7 dc.l $ff6048e7,$3f3c487a,$ff9e61ff,$00004f6c
8 dc.l $588f42ae,$ff78487b,$01700000,$00ea61ff
9 dc.l $00004f58,$588f61ff,$000000f0,$61ffffff
10 dc.l $ffa642ae,$ff78487b,$01700000,$0af661ff
[all …]
|
| H A D | ftest.sa | 1 dc.l $60ff0000,$00d40000,$60ff0000,$016c0000
2 dc.l $60ff0000,$01a80000,$54657374,$696e6720
3 dc.l $36383036,$30204650,$53502073,$74617274
4 dc.l $65643a0a,$00546573,$74696e67,$20363830
5 dc.l $36302046,$50535020,$756e696d,$706c656d
6 dc.l $656e7465,$6420696e,$73747275,$6374696f
7 dc.l $6e207374,$61727465,$643a0a00,$54657374
8 dc.l $696e6720,$36383036,$30204650,$53502065
9 dc.l $78636570,$74696f6e,$20656e61,$626c6564
10 dc.l $20737461,$72746564,$3a0a0070,$61737365
[all …]
|
| H A D | ilsp.sa | 1 dc.l $60ff0000,$01fe0000,$60ff0000,$02080000
2 dc.l $60ff0000,$04900000,$60ff0000,$04080000
3 dc.l $60ff0000,$051e0000,$60ff0000,$053c0000
4 dc.l $60ff0000,$055a0000,$60ff0000,$05740000
5 dc.l $60ff0000,$05940000,$60ff0000,$05b40000
6 dc.l $51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
7 dc.l $51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
8 dc.l $51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
9 dc.l $51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
10 dc.l $51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
[all …]
|
| /linux/drivers/dma/ |
| H A D | txx9dmac.c | 24 static struct txx9dmac_cregs __iomem *__dma_regs(const struct txx9dmac_chan *dc) in __dma_regs() argument
26 return dc->ch_regs; in __dma_regs()
30 const struct txx9dmac_chan *dc) in __dma_regs32() argument
32 return dc->ch_regs; in __dma_regs32()
35 #define channel64_readq(dc, name) \ argument
36 __raw_readq(&(__dma_regs(dc)->name))
37 #define channel64_writeq(dc, name, val) \ argument
38 __raw_writeq((val), &(__dma_regs(dc)->name))
39 #define channel64_readl(dc, name) \ argument
40 __raw_readl(&(__dma_regs(dc)->name))
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn20/ |
| H A D | dcn20_hwseq.h | 31 void dcn20_log_color_state(struct dc *dc,
38 struct dc *dc,
41 struct dc *dc,
43 void dcn20_update_plane_addr(const struct dc *dc, struct pipe_ctx *pipe_ctx);
44 void dcn20_update_mpcc(struct dc *dc, struct pipe_ctx *pipe_ctx);
45 bool dcn20_set_input_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx,
47 bool dcn20_set_output_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx,
49 void dcn20_program_output_csc(struct dc *dc,
57 void dcn20_disable_plane(struct dc *dc, struct dc_state *state, struct pipe_ctx *pipe_ctx);
59 struct dc *dc,
[all …]
|
| /linux/drivers/tty/ |
| H A D | nozomi.c | 315 struct nozomi *dc; member
463 static void nozomi_setup_memory(struct nozomi *dc) in nozomi_setup_memory() argument
465 void __iomem *offset = dc->base_addr + dc->config_table.dl_start; in nozomi_setup_memory()
472 dc->port[PORT_MDM].dl_addr[CH_A] = offset; in nozomi_setup_memory()
473 dc->port[PORT_MDM].dl_addr[CH_B] = in nozomi_setup_memory()
474 (offset += dc->config_table.dl_mdm_len1); in nozomi_setup_memory()
475 dc->port[PORT_MDM].dl_size[CH_A] = in nozomi_setup_memory()
476 dc->config_table.dl_mdm_len1 - buff_offset; in nozomi_setup_memory()
477 dc->port[PORT_MDM].dl_size[CH_B] = in nozomi_setup_memory()
478 dc->config_table.dl_mdm_len2 - buff_offset; in nozomi_setup_memory()
[all …]
|
| /linux/drivers/md/ |
| H A D | dm-delay.c | 59 struct delay_c *dc = timer_container_of(dc, t, delay_timer); in handle_delayed_timer() local
61 queue_work(dc->kdelayd_wq, &dc->flush_expired_bios); in handle_delayed_timer()
64 static void queue_timeout(struct delay_c *dc, unsigned long expires) in queue_timeout() argument
66 timer_reduce(&dc->delay_timer, expires); in queue_timeout()
69 static inline bool delay_is_fast(struct delay_c *dc) in delay_is_fast() argument
71 return !!dc->worker; in delay_is_fast()
86 static void flush_delayed_bios(struct delay_c *dc, bool flush_all) in flush_delayed_bios() argument
95 mutex_lock(&dc->process_bios_lock); in flush_delayed_bios()
96 spin_lock(&dc->delayed_bios_lock); in flush_delayed_bios()
97 list_replace_init(&dc->delayed_bios, &local_list); in flush_delayed_bios()
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc.c | 29 #include "dc.h"
95 dc->ctx
98 dc->ctx->logger
105 * DC is the OS-agnostic component of the amdgpu DC driver.
107 * DC maintains and validates a set of structs representing the state of the
110 * Main DC HW structs:
112 * struct dc - The central struct. One per driver. Created on driver load,
116 * Used as a backpointer by most other structs in dc.
129 * Main dc stat
163 destroy_links(struct dc * dc) destroy_links() argument
200 create_links(struct dc * dc,uint32_t num_virtual_links) create_links() argument
339 create_link_encoders(struct dc * dc) create_link_encoders() argument
380 destroy_link_encoders(struct dc * dc) destroy_link_encoders() argument
421 set_long_vtotal(struct dc * dc,struct dc_stream_state * stream,struct dc_crtc_timing_adjust * adjust) set_long_vtotal() argument
458 dc_stream_get_last_used_drr_vtotal(struct dc * dc,struct dc_stream_state * stream,uint32_t * refresh_rate) dc_stream_get_last_used_drr_vtotal() argument
532 struct dc *dc = stream->ctx->dc; dc_stream_forward_crc_window() local
598 struct dc *dc = stream->ctx->dc; dc_stream_forward_multiple_crc_window() local
642 dc_stream_configure_crc(struct dc * dc,struct dc_stream_state * stream,struct crc_params * crc_window,bool enable,bool continuous,uint8_t idx,bool reset,enum crc_poly_mode crc_poly_mode) dc_stream_configure_crc() argument
716 dc_stream_get_crc(struct dc * dc,struct dc_stream_state * stream,uint8_t idx,uint32_t * r_cr,uint32_t * g_y,uint32_t * b_cb) dc_stream_get_crc() argument
742 dc_stream_set_dyn_expansion(struct dc * dc,struct dc_stream_state * stream,enum dc_dynamic_expansion option) dc_stream_set_dyn_expansion() argument
806 dc_stream_set_gamut_remap(struct dc * dc,const struct dc_stream_state * stream) dc_stream_set_gamut_remap() argument
825 dc_stream_program_csc_matrix(struct dc * dc,struct dc_stream_state * stream) dc_stream_program_csc_matrix() argument
850 dc_stream_set_static_screen_params(struct dc * dc,struct dc_stream_state ** streams,int num_streams,const struct dc_static_screen_params * params) dc_stream_set_static_screen_params() argument
876 dc_destruct(struct dc * dc) dc_destruct() argument
934 dc_construct_ctx(struct dc * dc,const struct dc_init_data * init_params) dc_construct_ctx() argument
985 dc_construct(struct dc * dc,const struct dc_init_data * init_params) dc_construct() argument
1133 disable_all_writeback_pipes_for_stream(const struct dc * dc,struct dc_stream_state * stream,struct dc_state * context) disable_all_writeback_pipes_for_stream() argument
1145 apply_ctx_interdependent_lock(struct dc * dc,struct dc_state * context,struct dc_stream_state * stream,bool lock) apply_ctx_interdependent_lock() argument
1172 dc_update_visual_confirm_color(struct dc * dc,struct dc_state * context,struct pipe_ctx * pipe_ctx) dc_update_visual_confirm_color() argument
1216 dc_get_visual_confirm_for_stream(struct dc * dc,struct dc_stream_state * stream_state,struct tg_color * color) dc_get_visual_confirm_for_stream() argument
1274 dc_stream_adjust_vmin_vmax(struct dc * dc,struct dc_stream_state * stream,struct dc_crtc_timing_adjust * adjust) dc_stream_adjust_vmin_vmax() argument
1337 disable_dangling_plane(struct dc * dc,struct dc_state * context) disable_dangling_plane() argument
1446 disable_vbios_mode_if_required(struct dc * dc,struct dc_state * context) disable_vbios_mode_if_required() argument
1510 struct dc *dc = kzalloc_obj(*dc); dc_create() local
1562 detect_edp_presence(struct dc * dc) detect_edp_presence() argument
1584 dc_hardware_init(struct dc * dc) dc_hardware_init() argument
1593 dc_init_callbacks(struct dc * dc,const struct dc_callback_init * init_params) dc_init_callbacks() argument
1599 dc_deinit_callbacks(struct dc * dc) dc_deinit_callbacks() argument
1604 dc_destroy(struct dc ** dc) dc_destroy() argument
1612 enable_timing_multisync(struct dc * dc,struct dc_state * ctx) enable_timing_multisync() argument
1636 program_timing_sync(struct dc * dc,struct dc_state * ctx) program_timing_sync() argument
1773 streams_changed(struct dc * dc,struct dc_stream_state * streams[],uint8_t stream_count) streams_changed() argument
1792 dc_validate_boot_timing(const struct dc * dc,const struct dc_sink * sink,struct dc_crtc_timing * crtc_timing) dc_validate_boot_timing() argument
2094 dc_enable_stereo(struct dc * dc,struct dc_state * context,struct dc_stream_state * streams[],uint8_t stream_count) dc_enable_stereo() argument
2120 dc_trigger_sync(struct dc * dc,struct dc_state * context) dc_trigger_sync() argument
2130 get_stream_mask(struct dc * dc,struct dc_state * context) get_stream_mask() argument
2143 dc_z10_restore(const struct dc * dc) dc_z10_restore() argument
2149 dc_z10_save_init(struct dc * dc) dc_z10_save_init() argument
2163 determine_pipe_unlock_order(struct dc * dc,struct dc_state * context) determine_pipe_unlock_order() argument
2201 dc_commit_state_no_check(struct dc * dc,struct dc_state * context) dc_commit_state_no_check() argument
2444 dc_commit_streams(struct dc * dc,struct dc_commit_streams_params * params) dc_commit_streams() argument
2571 dc_acquire_release_mpc_3dlut(struct dc * dc,bool acquire,struct dc_stream_state * stream,struct dc_3dlut ** lut,struct dc_transfer_func ** shaper) dc_acquire_release_mpc_3dlut() argument
2606 is_flip_pending_in_pipes(struct dc * dc,struct dc_state * context) is_flip_pending_in_pipes() argument
2634 process_deferred_updates(struct dc * dc) process_deferred_updates() argument
2646 dc_post_update_surfaces_to_stream(struct dc * dc) dc_post_update_surfaces_to_stream() argument
2687 dc_get_default_tiling_info(const struct dc * dc,struct dc_tiling_info * tiling_info) dc_get_default_tiling_info() argument
3012 force_immediate_gsl_plane_flip(struct dc * dc,struct dc_surface_update * updates,int surface_count) force_immediate_gsl_plane_flip() argument
3288 copy_stream_update_to_stream(struct dc * dc,struct dc_state * context,struct dc_stream_state * stream,struct dc_stream_update * update) copy_stream_update_to_stream() argument
3483 update_seamless_boot_flags(struct dc * dc,struct dc_state * context,int surface_count,struct dc_stream_state * stream) update_seamless_boot_flags() argument
3518 backup_and_set_minimal_pipe_split_policy(struct dc * dc,struct dc_state * context,struct pipe_split_policy_backup * policy) backup_and_set_minimal_pipe_split_policy() argument
3539 restore_minimal_pipe_split_policy(struct dc * dc,struct dc_state * context,struct pipe_split_policy_backup * policy) restore_minimal_pipe_split_policy() argument
3577 update_planes_and_stream_state(struct dc * dc,struct dc_surface_update * srf_updates,int surface_count,struct dc_stream_state * stream,struct dc_stream_update * stream_update,enum surface_update_type * new_update_type,struct dc_state ** new_context) update_planes_and_stream_state() argument
3746 commit_planes_do_stream_update(struct dc * dc,struct dc_stream_state * stream,struct dc_stream_update * stream_update,enum surface_update_type update_type,struct dc_state * context) commit_planes_do_stream_update() argument
3896 dc_dmub_should_send_dirty_rect_cmd(struct dc * dc,struct dc_stream_state * stream) dc_dmub_should_send_dirty_rect_cmd() argument
3913 dc_dmub_update_dirty_rect(struct dc * dc,int surface_count,struct dc_stream_state * stream,const struct dc_surface_update * srf_updates,struct dc_state * context) dc_dmub_update_dirty_rect() argument
3972 build_dmub_update_dirty_rect(struct dc * dc,int surface_count,struct dc_stream_state * stream,struct dc_surface_update * srf_updates,struct dc_state * context,struct dc_dmub_cmd dc_dmub_cmd[],unsigned int * dmub_cmd_count) build_dmub_update_dirty_rect() argument
4060 build_dmub_cmd_list(struct dc * dc,struct dc_surface_update * srf_updates,int surface_count,struct dc_stream_state * stream,struct dc_state * context,struct dc_dmub_cmd dc_dmub_cmd[],unsigned int * dmub_cmd_count) build_dmub_cmd_list() argument
4073 commit_plane_for_stream_offload_fams2_flip(struct dc * dc,struct dc_surface_update * srf_updates,int surface_count,struct dc_stream_state * stream,struct dc_state * context) commit_plane_for_stream_offload_fams2_flip() argument
4112 commit_planes_for_stream_fast(struct dc * dc,struct dc_surface_update * srf_updates,int surface_count,struct dc_stream_state * stream,struct dc_stream_update * stream_update,enum surface_update_type update_type,struct dc_state * context) commit_planes_for_stream_fast() argument
4231 commit_planes_for_stream(struct dc * dc,const struct dc_surface_update * srf_updates,int surface_count,struct dc_stream_state * stream,struct dc_stream_update * stream_update,enum surface_update_type update_type,struct dc_state * context) commit_planes_for_stream() argument
4693 could_mpcc_tree_change_for_active_pipes(struct dc * dc,struct dc_stream_state * stream,struct dc_surface_update * srf_updates,int surface_count,bool * is_plane_addition) could_mpcc_tree_change_for_active_pipes() argument
4768 release_minimal_transition_state(struct dc * dc,struct dc_state * minimal_transition_context,struct dc_state * base_context,struct pipe_split_policy_backup * policy) release_minimal_transition_state() argument
4791 create_minimal_transition_state(struct dc * dc,struct dc_state * base_context,struct pipe_split_policy_backup * policy) create_minimal_transition_state() argument
4819 is_pipe_topology_transition_seamless_with_intermediate_step(struct dc * dc,struct dc_state * initial_state,struct dc_state * intermediate_state,struct dc_state * final_state) is_pipe_topology_transition_seamless_with_intermediate_step() argument
4830 swap_and_release_current_context(struct dc * dc,struct dc_state * new_context,struct dc_stream_state * stream) swap_and_release_current_context() argument
4873 commit_minimal_transition_based_on_new_context(struct dc * dc,struct dc_state * new_context,struct dc_stream_state * stream,struct dc_stream_update * stream_update,struct dc_surface_update * srf_updates,int surface_count) commit_minimal_transition_based_on_new_context() argument
4907 commit_minimal_transition_based_on_current_context(struct dc * dc,struct dc_state * new_context,struct dc_stream_state * stream) commit_minimal_transition_based_on_current_context() argument
4981 commit_minimal_transition_state_in_dc_update(struct dc * dc,struct dc_state * new_context,struct dc_stream_state * stream,struct dc_surface_update * srf_updates,int surface_count) commit_minimal_transition_state_in_dc_update() argument
5016 commit_minimal_transition_state(struct dc * dc,struct dc_state * transition_base_context) commit_minimal_transition_state() argument
5178 full_update_required_weak(const struct dc * dc,const struct dc_surface_update * srf_updates,int surface_count,const struct dc_stream_update * stream_update,const struct dc_stream_state * stream) full_update_required_weak() argument
5206 full_update_required(const struct dc * dc,const struct dc_surface_update * srf_updates,int surface_count,const struct dc_stream_update * stream_update,const struct dc_stream_state * stream) full_update_required() argument
5275 fast_update_only(const struct dc * dc,const struct dc_fast_update * fast_update,const struct dc_surface_update * srf_updates,int surface_count,const struct dc_stream_update * stream_update,const struct dc_stream_state * stream) fast_update_only() argument
5286 update_planes_and_stream_v2(struct dc * dc,struct dc_surface_update * srf_updates,int surface_count,struct dc_stream_state * stream,struct dc_stream_update * stream_update) update_planes_and_stream_v2() argument
5373 commit_planes_and_stream_update_on_current_context(struct dc * dc,struct dc_surface_update * srf_updates,int surface_count,struct dc_stream_state * stream,struct dc_stream_update * stream_update,enum surface_update_type update_type) commit_planes_and_stream_update_on_current_context() argument
5405 commit_planes_and_stream_update_with_new_context(struct dc * dc,struct dc_surface_update * srf_updates,int surface_count,struct dc_stream_state * stream,struct dc_stream_update * stream_update,enum surface_update_type update_type,struct dc_state * new_context) commit_planes_and_stream_update_with_new_context() argument
5471 update_planes_and_stream_v3(struct dc * dc,struct dc_surface_update * srf_updates,int surface_count,struct dc_stream_state * stream,struct dc_stream_update * stream_update) update_planes_and_stream_v3() argument
5523 dc_update_planes_and_stream(struct dc * dc,struct dc_surface_update * srf_updates,int surface_count,struct dc_stream_state * stream,struct dc_stream_update * stream_update) dc_update_planes_and_stream() argument
5547 dc_commit_updates_for_stream(struct dc * dc,struct dc_surface_update * srf_updates,int surface_count,struct dc_stream_state * stream,struct dc_stream_update * stream_update,struct dc_state * state) dc_commit_updates_for_stream() argument
5575 dc_get_current_stream_count(struct dc * dc) dc_get_current_stream_count() argument
5580 dc_get_stream_at_index(struct dc * dc,uint8_t i) dc_get_stream_at_index() argument
5588 dc_interrupt_to_irq_source(struct dc * dc,uint32_t src_id,uint32_t ext_id) dc_interrupt_to_irq_source() argument
5598 dc_interrupt_set(struct dc * dc,enum dc_irq_source src,bool enable) dc_interrupt_set() argument
5607 dc_interrupt_ack(struct dc * dc,enum dc_irq_source src) dc_interrupt_ack() argument
5612 dc_power_down_on_boot(struct dc * dc) dc_power_down_on_boot() argument
5625 dc_set_power_state(struct dc * dc,enum dc_acpi_cm_power_state power_state) dc_set_power_state() argument
5666 dc_resume(struct dc * dc) dc_resume() argument
5674 dc_is_dmcu_initialized(struct dc * dc) dc_is_dmcu_initialized() argument
5683 dc_set_clock(struct dc * dc,enum dc_clock_type clock_type,uint32_t clk_khz,uint32_t stepping) dc_set_clock() argument
5689 dc_get_clock(struct dc * dc,enum dc_clock_type clock_type,struct dc_clock_config * clock_cfg) dc_get_clock() argument
5696 dc_set_psr_allow_active(struct dc * dc,bool enable) dc_set_psr_allow_active() argument
5726 dc_set_replay_allow_active(struct dc * dc,bool active) dc_set_replay_allow_active() argument
5758 dc_set_ips_disable(struct dc * dc,unsigned int disable_ips) dc_set_ips_disable() argument
5767 dc_allow_idle_optimizations_internal(struct dc * dc,bool allow,char const * caller_name) dc_allow_idle_optimizations_internal() argument
5819 dc_exit_ips_for_hw_access_internal(struct dc * dc,const char * caller_name) dc_exit_ips_for_hw_access_internal() argument
5825 dc_dmub_is_ips_idle_state(struct dc * dc) dc_dmub_is_ips_idle_state() argument
5840 dc_unlock_memory_clock_frequency(struct dc * dc) dc_unlock_memory_clock_frequency() argument
5850 dc_lock_memory_clock_frequency(struct dc * dc) dc_lock_memory_clock_frequency() argument
5862 blank_and_force_memclk(struct dc * dc,bool apply,unsigned int memclk_mhz) blank_and_force_memclk() argument
5919 dc_enable_dcmode_clk_limit(struct dc * dc,bool enable) dc_enable_dcmode_clk_limit() argument
5958 dc_is_plane_eligible_for_idle_optimizations(struct dc * dc,unsigned int pitch,unsigned int height,enum surface_pixel_format format,struct dc_cursor_attributes * cursor_attr) dc_is_plane_eligible_for_idle_optimizations() argument
5970 dc_hardware_release(struct dc * dc) dc_hardware_release() argument
5978 dc_mclk_switch_using_fw_based_vblank_stretch_shut_down(struct dc * dc) dc_mclk_switch_using_fw_based_vblank_stretch_shut_down() argument
5996 dc_is_dmub_outbox_supported(struct dc * dc) dc_is_dmub_outbox_supported() argument
6038 dc_enable_dmub_notifications(struct dc * dc) dc_enable_dmub_notifications() argument
6050 dc_enable_dmub_outbox(struct dc * dc) dc_enable_dmub_outbox() argument
6067 dc_process_dmub_aux_transfer_async(struct dc * dc,uint32_t link_index,struct aux_payload * payload) dc_process_dmub_aux_transfer_async() argument
6133 struct dc *dc = link->ctx->dc; dc_smart_power_oled_enable() local
6194 struct dc *dc = link->ctx->dc; dc_smart_power_oled_get_max_cll() local
6224 get_link_index_from_dpia_port_index(const struct dc * dc,uint8_t dpia_port_index) get_link_index_from_dpia_port_index() argument
6257 dc_process_dmub_set_config_async(struct dc * dc,uint32_t link_index,struct set_config_cmd_payload * payload,struct dmub_notification * notify) dc_process_dmub_set_config_async() argument
6302 dc_process_dmub_set_mst_slots(const struct dc * dc,uint32_t link_index,uint8_t mst_alloc_slots,uint8_t * mst_slots_in_use) dc_process_dmub_set_mst_slots() argument
6347 dc_process_dmub_dpia_set_tps_notification(const struct dc * dc,uint32_t link_index,uint8_t tps) dc_process_dmub_dpia_set_tps_notification() argument
6367 dc_process_dmub_dpia_hpd_int_enable(const struct dc * dc,uint32_t hpd_int_enable) dc_process_dmub_dpia_hpd_int_enable() argument
6387 dc_print_dmub_diagnostic_data(const struct dc * dc) dc_print_dmub_diagnostic_data() argument
6396 dc_disable_accelerated_mode(struct dc * dc) dc_disable_accelerated_mode() argument
6411 dc_notify_vsync_int_state(struct dc * dc,struct dc_stream_state * stream,bool enable) dc_notify_vsync_int_state() argument
6463 dc_abm_save_restore(struct dc * dc,struct dc_stream_state * stream,struct abm_save_restore * pData) dc_abm_save_restore() argument
6507 dc_query_current_properties(struct dc * dc,struct dc_current_properties * properties) dc_query_current_properties() argument
6540 dc_set_edp_power(const struct dc * dc,struct dc_link * edp_link,bool powerOn) dc_set_edp_power() argument
6569 struct dc *dc = context->clk_mgr->ctx->dc; dc_get_power_profile_for_dc_state() local
6587 struct dc *dc = context->clk_mgr->ctx->dc; dc_get_det_buffer_size_from_state() local
6608 struct dc *dc; dc_get_host_router_index() local
6625 dc_is_cursor_limit_pending(struct dc * dc) dc_is_cursor_limit_pending() argument
6637 dc_can_clear_cursor_limit(const struct dc * dc) dc_can_clear_cursor_limit() argument
6649 dc_get_underflow_debug_data_for_otg(struct dc * dc,int primary_otg_inst,struct dc_underflow_debug_data * out_data) dc_get_underflow_debug_data_for_otg() argument
6667 dc_get_power_feature_status(struct dc * dc,int primary_otg_inst,struct power_features * out_data) dc_get_power_feature_status() argument
6675 dc_capture_register_software_state(struct dc * dc,struct dc_register_software_state * state) dc_capture_register_software_state() argument
7236 dc_log_preos_dmcub_info(const struct dc * dc) dc_log_preos_dmcub_info() argument
7241 dc_get_qos_info(struct dc * dc,struct dc_qos_info * info) dc_get_qos_info() argument
7277 struct dc *dc; global() member
7349 transition_countdown_init(struct dc * dc) transition_countdown_init() argument
7588 dc_update_planes_and_stream_init(struct dc * dc,struct dc_surface_update * surface_updates,int surface_count,struct dc_stream_state * stream,struct dc_stream_update * stream_update) dc_update_planes_and_stream_init() argument
[all...] |
| H A D | dc_stream.c | 28 #include "dc.h"
37 #define DC_LOGGER dc->ctx->logger
64 if (stream->ctx->dc->caps.dual_link_dvi && in update_stream_signal()
267 if (new_stream->ctx->dc->res_pool->funcs->link_encs_assign && in program_cursor_attributes()
268 !new_stream->ctx->dc->config.unify_link_enc_assignment) in program_cursor_attributes()
280 * The given stream is expected to exist in dc->current_state. Otherwise, NULL in program_cursor_attributes()
286 struct dc *dc = stream->ctx->dc; in program_cursor_attributes()
287 return dc_state_get_stream_status(dc in program_cursor_attributes()
251 struct dc *dc = stream->ctx->dc; dc_stream_get_status() local
258 struct dc *dc = stream->ctx->dc; dc_stream_get_status_const() local
263 program_cursor_attributes(struct dc * dc,struct dc_stream_state * stream) program_cursor_attributes() argument
322 const struct dc *dc; dc_stream_check_cursor_attributes() local
381 struct dc *dc; dc_stream_program_cursor_attributes() local
410 program_cursor_position(struct dc * dc,struct dc_stream_state * stream) program_cursor_position() argument
482 struct dc *dc; dc_stream_program_cursor_position() local
551 dc_stream_add_writeback(struct dc * dc,struct dc_stream_state * stream,struct dc_writeback_info * wb_info) dc_stream_add_writeback() argument
625 dc_stream_fc_disable_writeback(struct dc * dc,struct dc_stream_state * stream,uint32_t dwb_pipe_inst) dc_stream_fc_disable_writeback() argument
662 dc_stream_remove_writeback(struct dc * dc,struct dc_stream_state * stream,uint32_t dwb_pipe_inst) dc_stream_remove_writeback() argument
721 struct dc *dc = stream->ctx->dc; dc_stream_get_vblank_counter() local
744 struct dc *dc; dc_stream_send_dp_sdp() local
784 struct dc *dc; dc_stream_get_scanoutpos() local
814 dc_stream_dmdata_status_done(struct dc * dc,struct dc_stream_state * stream) dc_stream_dmdata_status_done() argument
836 dc_stream_set_dynamic_metadata(struct dc * dc,struct dc_stream_state * stream,struct dc_dmdata_attributes * attr) dc_stream_set_dynamic_metadata() argument
879 dc_stream_add_dsc_to_resource(struct dc * dc,struct dc_state * state,struct dc_stream_state * stream) dc_stream_add_dsc_to_resource() argument
904 dc_stream_log(const struct dc * dc,const struct dc_stream_state * stream) dc_stream_log() argument
958 dc_stream_get_3dlut_for_stream(const struct dc * dc,const struct dc_stream_state * stream,bool allocate_one) dc_stream_get_3dlut_for_stream() argument
990 dc_stream_release_3dlut_for_stream(const struct dc * dc,const struct dc_stream_state * stream) dc_stream_release_3dlut_for_stream() argument
1003 dc_stream_init_rmcm_3dlut(struct dc * dc) dc_stream_init_rmcm_3dlut() argument
1292 dc_stream_is_cursor_limit_pending(struct dc * dc,struct dc_stream_state * stream) dc_stream_is_cursor_limit_pending() argument
1302 dc_stream_can_clear_cursor_limit(struct dc * dc,struct dc_stream_state * stream) dc_stream_can_clear_cursor_limit() argument
[all...] |
| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn32/ |
| H A D | dcn32_hwseq.h | 31 struct dc;
44 bool dcn32_apply_idle_power_optimizations(struct dc *dc, bool enable);
46 void dcn32_cab_for_ss_control(struct dc *dc, bool enable);
48 void dcn32_commit_subvp_config(struct dc *dc, struct dc_state *context);
53 bool dcn32_set_input_transfer_func(struct dc *dc,
60 bool dcn32_set_output_transfer_func(struct dc *dc,
64 void dcn32_init_hw(struct dc *dc);
66 void dcn32_program_mall_pipe_config(struct dc *dc, struct dc_state *context);
68 void dcn32_update_mall_sel(struct dc *dc, struct dc_state *context);
70 void dcn32_update_force_pstate(struct dc *dc, struct dc_state *context);
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/dml/ |
| H A D | Makefile | 47 CFLAGS_$(AMDDALPATH)/dc/dml/display_mode_lib.o := $(dml_ccflags)
48 CFLAGS_$(AMDDALPATH)/dc/dml/display_mode_vba.o := $(dml_ccflags)
49 CFLAGS_$(AMDDALPATH)/dc/dml/dcn10/dcn10_fpu.o := $(dml_ccflags)
50 CFLAGS_$(AMDDALPATH)/dc/dml/dcn20/dcn20_fpu.o := $(dml_ccflags)
51 CFLAGS_$(AMDDALPATH)/dc/dml/dcn20/display_mode_vba_20.o := $(dml_ccflags) $(frame_warn_flag)
52 CFLAGS_$(AMDDALPATH)/dc/dml/dcn20/display_rq_dlg_calc_20.o := $(dml_ccflags)
53 CFLAGS_$(AMDDALPATH)/dc/dml/dcn20/display_mode_vba_20v2.o := $(dml_ccflags) $(frame_warn_flag)
54 CFLAGS_$(AMDDALPATH)/dc/dml/dcn20/display_rq_dlg_calc_20v2.o := $(dml_ccflags)
55 CFLAGS_$(AMDDALPATH)/dc/dml/dcn21/display_mode_vba_21.o := $(dml_ccflags) $(frame_warn_flag)
56 CFLAGS_$(AMDDALPATH)/dc/dm
[all...] |
| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/ |
| H A D | dcn401_hwseq.c | 52 dc->ctx->logger
59 void dcn401_initialize_min_clocks(struct dc *dc) in dcn401_initialize_min_clocks()
61 struct dc_clocks *clocks = &dc->current_state->bw_ctx.bw.dcn.clk; in dcn401_initialize_min_clocks()
64 clocks->dcfclk_khz = dc->clk_mgr->bw_params->clk_table.entries[0].dcfclk_mhz * 1000; in dcn401_initialize_min_clocks()
65 clocks->socclk_khz = dc->clk_mgr->bw_params->clk_table.entries[0].socclk_mhz * 1000; in dcn401_initialize_min_clocks()
66 clocks->dramclk_khz = dc->clk_mgr->bw_params->clk_table.entries[0].memclk_mhz * 1000; in dcn401_initialize_min_clocks()
67 clocks->dppclk_khz = dc->clk_mgr->bw_params->clk_table.entries[0].dppclk_mhz * 1000; in dcn401_initialize_min_clocks()
68 if (dc->debug.disable_boot_optimizations) { in dcn401_initialize_min_clocks()
69 clocks->dispclk_khz = dc in dcn401_initialize_min_clocks()
58 dcn401_initialize_min_clocks(struct dc * dc) dcn401_initialize_min_clocks() argument
136 dcn401_init_hw(struct dc * dc) dcn401_init_hw() argument
377 dcn401_trigger_3dlut_dma_load(struct dc * dc,struct pipe_ctx * pipe_ctx) dcn401_trigger_3dlut_dma_load() argument
390 struct dc *dc = pipe_ctx->plane_res.hubp->ctx->dc; dcn401_set_mcm_luts() local
556 dcn401_set_output_transfer_func(struct dc * dc,struct pipe_ctx * pipe_ctx,const struct dc_stream_state * stream) dcn401_set_output_transfer_func() argument
613 enable_stream_timing_calc(struct pipe_ctx * pipe_ctx,struct dc_state * context,struct dc * dc,unsigned int * tmds_div,int * opp_inst,int * opp_cnt,struct pipe_ctx * opp_heads[MAX_PIPES],bool * manual_mode,struct drr_params * params,unsigned int * event_triggers) enable_stream_timing_calc() argument
654 dcn401_enable_stream_timing(struct pipe_ctx * pipe_ctx,struct dc_state * context,struct dc * dc) dcn401_enable_stream_timing() argument
811 struct dc *dc = pipe_ctx->stream->ctx->dc; dcn401_enable_stream_calc() local
847 struct dc *dc = pipe_ctx->stream->ctx->dc; dcn401_enable_stream() local
919 struct dc *dc = link->ctx->dc; disable_link_output_symclk_on_tx_off() local
940 struct dc *dc = link->ctx->dc; dcn401_disable_link_output() local
1143 dcn401_check_no_memory_request_for_cab(struct dc * dc) dcn401_check_no_memory_request_for_cab() argument
1158 dcn401_calculate_cab_allocation(struct dc * dc,struct dc_state * ctx) dcn401_calculate_cab_allocation() argument
1189 dcn401_apply_idle_power_optimizations(struct dc * dc,bool enable) dcn401_apply_idle_power_optimizations() argument
1263 dcn401_wait_for_dcc_meta_propagation(const struct dc * dc,const struct pipe_ctx * top_pipe) dcn401_wait_for_dcc_meta_propagation() argument
1288 dcn401_prepare_bandwidth(struct dc * dc,struct dc_state * context) dcn401_prepare_bandwidth() argument
1347 dcn401_optimize_bandwidth(struct dc * dc,struct dc_state * context) dcn401_optimize_bandwidth() argument
1396 dcn401_dmub_hw_control_lock(struct dc * dc,struct dc_state * context,bool lock) dcn401_dmub_hw_control_lock() argument
1419 struct dc *dc = params->dmub_hw_control_lock_fast_params.dc; dcn401_dmub_hw_control_lock_fast() local
1433 dcn401_fams2_update_config(struct dc * dc,struct dc_state * context,bool enable) dcn401_fams2_update_config() argument
1446 update_dsc_for_odm_change(struct dc * dc,struct dc_state * context,struct pipe_ctx * otg_master) update_dsc_for_odm_change() argument
1485 dcn401_update_odm(struct dc * dc,struct dc_state * context,struct pipe_ctx * otg_master) dcn401_update_odm() argument
1530 dcn401_add_dsc_sequence_for_odm_change(struct dc * dc,struct dc_state * context,struct pipe_ctx * otg_master,struct block_sequence_state * seq_state) dcn401_add_dsc_sequence_for_odm_change() argument
1622 dcn401_update_odm_sequence(struct dc * dc,struct dc_state * context,struct pipe_ctx * otg_master,struct block_sequence_state * seq_state) dcn401_update_odm_sequence() argument
1694 dcn401_hardware_release(struct dc * dc) dcn401_hardware_release() argument
1724 dcn401_wait_for_det_buffer_update_under_otg_master(struct dc * dc,struct dc_state * context,struct pipe_ctx * otg_master) dcn401_wait_for_det_buffer_update_under_otg_master() argument
1757 dcn401_interdependent_update_lock(struct dc * dc,struct dc_state * context,bool lock) dcn401_interdependent_update_lock() argument
1860 dcn401_program_outstanding_updates(struct dc * dc,struct dc_state * context) dcn401_program_outstanding_updates() argument
1871 dcn401_reset_back_end_for_pipe(struct dc * dc,struct pipe_ctx * pipe_ctx,struct dc_state * context) dcn401_reset_back_end_for_pipe() argument
1957 dc_hwss_disable_otg_pwa(struct dc * dc) dc_hwss_disable_otg_pwa() argument
1975 dcn401_reset_hw_ctx_wrap(struct dc * dc,struct dc_state * context) dcn401_reset_hw_ctx_wrap() argument
2035 dcn401_program_tg(struct dc * dc,struct pipe_ctx * pipe_ctx,struct dc_state * context,struct dce_hwseq * hws) dcn401_program_tg() argument
2059 dcn401_program_pipe(struct dc * dc,struct pipe_ctx * pipe_ctx,struct dc_state * context) dcn401_program_pipe() argument
2188 dcn401_program_pipe_sequence(struct dc * dc,struct pipe_ctx * pipe_ctx,struct dc_state * context,struct block_sequence_state * seq_state) dcn401_program_pipe_sequence() argument
2337 dcn401_program_front_end_for_ctx(struct dc * dc,struct dc_state * context) dcn401_program_front_end_for_ctx() argument
2500 dcn401_post_unlock_program_front_end(struct dc * dc,struct dc_state * context) dcn401_post_unlock_program_front_end() argument
2632 dcn401_update_bandwidth(struct dc * dc,struct dc_state * context) dcn401_update_bandwidth() argument
2881 dcn401_plane_atomic_power_down(struct dc * dc,struct dpp * dpp,struct hubp * hubp) dcn401_plane_atomic_power_down() argument
2915 dcn401_update_cursor_offload_pipe(struct dc * dc,const struct pipe_ctx * pipe) dcn401_update_cursor_offload_pipe() argument
2971 dcn401_plane_atomic_power_down_sequence(struct dc * dc,struct dpp * dpp,struct hubp * hubp,struct block_sequence_state * seq_state) dcn401_plane_atomic_power_down_sequence() argument
3009 dcn401_plane_atomic_disconnect_sequence(struct dc * dc,struct dc_state * state,struct pipe_ctx * pipe_ctx,struct block_sequence_state * seq_state) dcn401_plane_atomic_disconnect_sequence() argument
3051 dcn401_blank_pixel_data_sequence(struct dc * dc,struct pipe_ctx * pipe_ctx,bool blank,struct block_sequence_state * seq_state) dcn401_blank_pixel_data_sequence() argument
3130 dcn401_program_all_writeback_pipes_in_tree_sequence(struct dc * dc,const struct dc_stream_state * stream,struct dc_state * context,struct block_sequence_state * seq_state) dcn401_program_all_writeback_pipes_in_tree_sequence() argument
3187 dcn401_enable_writeback_sequence(struct dc * dc,struct dc_writeback_info * wb_info,struct dc_state * context,int mpcc_inst,struct block_sequence_state * seq_state) dcn401_enable_writeback_sequence() argument
3222 dcn401_disable_writeback_sequence(struct dc * dc,struct dc_writeback_info * wb_info,struct block_sequence_state * seq_state) dcn401_disable_writeback_sequence() argument
3246 dcn401_update_writeback_sequence(struct dc * dc,struct dc_writeback_info * wb_info,struct dc_state * context,struct block_sequence_state * seq_state) dcn401_update_writeback_sequence() argument
3268 find_free_gsl_group(const struct dc * dc) find_free_gsl_group() argument
3281 dcn401_setup_gsl_group_as_lock_sequence(const struct dc * dc,struct pipe_ctx * pipe_ctx,bool enable,struct block_sequence_state * seq_state) dcn401_setup_gsl_group_as_lock_sequence() argument
3354 dcn401_disable_plane_sequence(struct dc * dc,struct dc_state * state,struct pipe_ctx * pipe_ctx,struct block_sequence_state * seq_state) dcn401_disable_plane_sequence() argument
3408 dcn401_post_unlock_reset_opp_sequence(struct dc * dc,struct pipe_ctx * opp_head,struct block_sequence_state * seq_state) dcn401_post_unlock_reset_opp_sequence() argument
3445 dcn401_dc_ip_request_cntl(struct dc * dc,bool enable) dcn401_dc_ip_request_cntl() argument
3453 dcn401_enable_plane_sequence(struct dc * dc,struct pipe_ctx * pipe_ctx,struct dc_state * context,struct block_sequence_state * seq_state) dcn401_enable_plane_sequence() argument
3514 dcn401_update_dchubp_dpp_sequence(struct dc * dc,struct pipe_ctx * pipe_ctx,struct dc_state * context,struct block_sequence_state * seq_state) dcn401_update_dchubp_dpp_sequence() argument
3698 dcn401_update_mpcc_sequence(struct dc * dc,struct pipe_ctx * pipe_ctx,struct block_sequence_state * seq_state) dcn401_update_mpcc_sequence() argument
3797 dcn401_wait_for_mpcc_disconnect_sequence(struct dc * dc,struct resource_pool * res_pool,struct pipe_ctx * pipe_ctx,struct block_sequence_state * seq_state) dcn401_wait_for_mpcc_disconnect_sequence() argument
3828 dcn401_setup_vupdate_interrupt_sequence(struct dc * dc,struct pipe_ctx * pipe_ctx,struct block_sequence_state * seq_state) dcn401_setup_vupdate_interrupt_sequence() argument
3858 dcn401_program_mall_pipe_config_sequence(struct dc * dc,struct dc_state * context,struct block_sequence_state * seq_state) dcn401_program_mall_pipe_config_sequence() argument
3920 dcn401_verify_allow_pstate_change_high_sequence(struct dc * dc,struct block_sequence_state * seq_state) dcn401_verify_allow_pstate_change_high_sequence() argument
3934 dcn401_hw_wa_force_recovery_sequence(struct dc * dc,struct block_sequence_state * seq_state) dcn401_hw_wa_force_recovery_sequence() argument
[all...] |
| /linux/drivers/gpu/drm/tegra/ |
| H A D | dc.c | 33 #include "dc.h"
148 static u32 tegra_dc_readl_active(struct tegra_dc *dc, unsigned long offset) in compute_dda_inc()
152 tegra_dc_writel(dc, READ_MUX, DC_CMD_STATE_ACCESS); in compute_dda_inc()
153 value = tegra_dc_readl(dc, offset); in compute_dda_inc()
154 tegra_dc_writel(dc, 0, DC_CMD_STATE_ACCESS); in compute_dda_inc()
177 dev_WARN(plane->dc->dev, "invalid offset: %x\n", offset); in tegra_plane_setup_blending_legacy()
185 return tegra_dc_readl(plane->dc, tegra_plane_offset(plane, offset)); in tegra_plane_setup_blending_legacy()
191 tegra_dc_writel(plane->dc, value, tegra_plane_offset(plane, offset)); in tegra_plane_setup_blending_legacy()
194 bool tegra_dc_has_output(struct tegra_dc *dc, struct device *dev) in tegra_plane_setup_blending_legacy()
196 struct device_node *np = dc in tegra_plane_setup_blending_legacy()
51 tegra_dc_readl_active(struct tegra_dc * dc,unsigned long offset) tegra_dc_readl_active() argument
97 tegra_dc_has_output(struct tegra_dc * dc,struct device * dev) tegra_dc_has_output() argument
122 tegra_dc_commit(struct tegra_dc * dc) tegra_dc_commit() argument
318 struct tegra_dc *dc = plane->dc; tegra_plane_use_horizontal_filtering() local
333 struct tegra_dc *dc = plane->dc; tegra_plane_use_vertical_filtering() local
351 struct tegra_dc *dc = plane->dc; tegra_dc_setup_window() local
630 struct tegra_dc *dc = to_tegra_dc(new_plane_state->crtc); tegra_plane_atomic_check() local
805 tegra_primary_plane_create(struct drm_device * drm,struct tegra_dc * dc) tegra_primary_plane_create() argument
908 struct tegra_dc *dc = to_tegra_dc(new_state->crtc); __tegra_cursor_atomic_update() local
1015 struct tegra_dc *dc; tegra_cursor_atomic_disable() local
1071 struct tegra_dc *dc = to_tegra_dc(new_state->crtc); tegra_cursor_atomic_async_update() local
1110 tegra_dc_cursor_plane_create(struct drm_device * drm,struct tegra_dc * dc) tegra_dc_cursor_plane_create() argument
1255 tegra_dc_overlay_plane_create(struct drm_device * drm,struct tegra_dc * dc,unsigned int index,bool cursor) tegra_dc_overlay_plane_create() argument
1314 tegra_dc_add_shared_planes(struct drm_device * drm,struct tegra_dc * dc) tegra_dc_add_shared_planes() argument
1352 tegra_dc_add_planes(struct drm_device * drm,struct tegra_dc * dc) tegra_dc_add_planes() argument
1649 struct tegra_dc *dc = node->info_ent->data; tegra_dc_show_regs() local
1675 struct tegra_dc *dc = node->info_ent->data; tegra_dc_show_crc() local
1706 struct tegra_dc *dc = node->info_ent->data; tegra_dc_show_stats() local
1732 struct tegra_dc *dc = to_tegra_dc(crtc); tegra_dc_late_register() local
1757 struct tegra_dc *dc = to_tegra_dc(crtc); tegra_dc_early_unregister() local
1773 struct tegra_dc *dc = to_tegra_dc(crtc); tegra_dc_get_vblank_counter() local
1785 struct tegra_dc *dc = to_tegra_dc(crtc); tegra_dc_enable_vblank() local
1797 struct tegra_dc *dc = to_tegra_dc(crtc); tegra_dc_disable_vblank() local
1819 tegra_dc_set_timings(struct tegra_dc * dc,struct drm_display_mode * mode) tegra_dc_set_timings() argument
1863 tegra_dc_state_setup_clock(struct tegra_dc * dc,struct drm_crtc_state * crtc_state,struct clk * clk,unsigned long pclk,unsigned int div) tegra_dc_state_setup_clock() argument
1880 tegra_dc_update_voltage_state(struct tegra_dc * dc,struct tegra_dc_state * state) tegra_dc_update_voltage_state() argument
1926 tegra_dc_set_clock_rate(struct tegra_dc * dc,struct tegra_dc_state * state) tegra_dc_set_clock_rate() argument
1963 tegra_dc_stop(struct tegra_dc * dc) tegra_dc_stop() argument
1975 tegra_dc_idle(struct tegra_dc * dc) tegra_dc_idle() argument
1984 tegra_dc_wait_idle(struct tegra_dc * dc,unsigned long timeout) tegra_dc_wait_idle() argument
2009 struct tegra_dc *dc = to_tegra_dc(crtc); tegra_crtc_update_memory_bandwidth() local
2099 struct tegra_dc *dc = to_tegra_dc(crtc); tegra_crtc_atomic_disable() local
2165 struct tegra_dc *dc = to_tegra_dc(crtc); tegra_crtc_atomic_enable() local
2318 struct tegra_dc *dc = to_tegra_dc(crtc); tegra_crtc_atomic_flush() local
2400 struct tegra_dc *dc = to_tegra_dc(crtc); tegra_crtc_calculate_memory_bandwidth() local
2537 struct tegra_dc *dc = data; tegra_dc_irq() local
2585 tegra_dc_has_window_groups(struct tegra_dc * dc) tegra_dc_has_window_groups() argument
2616 struct tegra_dc *dc = host1x_client_to_dc(client); tegra_dc_init() local
2737 struct tegra_dc *dc = host1x_client_to_dc(client); tegra_dc_exit() local
2772 struct tegra_dc *dc = host1x_client_to_dc(client); tegra_dc_runtime_suspend() local
2793 struct tegra_dc *dc = host1x_client_to_dc(client); tegra_dc_runtime_resume() local
3087 tegra_dc_parse_dt(struct tegra_dc * dc) tegra_dc_parse_dt() argument
3126 struct tegra_dc *dc = dev_get_drvdata(dev); tegra_dc_match_by_pipe() local
3132 tegra_dc_couple(struct tegra_dc * dc) tegra_dc_couple() argument
3158 tegra_dc_init_opp_table(struct tegra_dc * dc) tegra_dc_init_opp_table() argument
3178 struct tegra_dc *dc; tegra_dc_probe() local
3284 struct tegra_dc *dc = platform_get_drvdata(pdev); tegra_dc_remove() local
[all...] |
| /linux/drivers/scsi/esas2r/ |
| H A D | esas2r_disc.c | 291 struct esas2r_disc_context *dc = &a->disc_ctx; in esas2r_disc_queue_event() local
298 dc->disc_evt |= disc_evt; in esas2r_disc_queue_event()
314 struct esas2r_disc_context *dc = &a->disc_ctx; in esas2r_disc_start_port() local
326 if (dc->disc_evt) { in esas2r_disc_start_port()
352 esas2r_trace("disc_evt: %d", dc->disc_evt); in esas2r_disc_start_port()
354 dc->flags = 0; in esas2r_disc_start_port()
357 dc->flags |= DCF_POLLED; in esas2r_disc_start_port()
359 rq->interrupt_cx = dc; in esas2r_disc_start_port()
363 if (dc->disc_evt & DCDE_DEV_SCAN) { in esas2r_disc_start_port()
364 dc->disc_evt &= ~DCDE_DEV_SCAN; in esas2r_disc_start_port()
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/ |
| H A D | dc_stream.h | 76 /* source MPCC instance. for use by internally by dc */
144 * When force_odm_combine_segments is non zero, allow dc to
273 /* Output from DC when stream state is committed or altered
274 * DC may only access these values during:
377 bool dc_update_planes_and_stream(struct dc *dc,
387 struct dc *dc,
419 void dc_commit_updates_for_stream(struct dc *dc,
[all...] |
| /linux/drivers/gpu/drm/amd/display/dc/hwss/dce110/ |
| H A D | dce110_hwseq.c | 27 #include "dc.h"
210 struct dc *dc, in dce110_enable_display_power_gating() argument
217 struct dc_context *ctx = dc->ctx; in dce110_enable_display_power_gating()
218 unsigned int underlay_idx = dc->res_pool->underlay_pipe_index; in dce110_enable_display_power_gating()
286 dce110_set_input_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx, in dce110_set_input_transfer_func() argument
289 (void)dc; in dce110_set_input_transfer_func()
610 dce110_set_output_transfer_func(struct dc *dc, struc argument
672 struct dc *dc = link->ctx->dc; dce110_external_encoder_control() local
727 const struct dc *dc = link->dc; dce110_enable_stream() local
1126 struct dc *dc; dce110_enable_audio_stream() local
1166 struct dc *dc; dce110_disable_audio_stream() local
1204 struct dc *dc = pipe_ctx->stream->ctx->dc; dce110_disable_stream() local
1531 program_scaler(const struct dc * dc,const struct pipe_ctx * pipe_ctx) program_scaler() argument
1573 dce110_enable_stream_timing(struct pipe_ctx * pipe_ctx,struct dc_state * context,struct dc * dc) dce110_enable_stream_timing() argument
1639 dce110_apply_single_controller_ctx_to_hw(struct pipe_ctx * pipe_ctx,struct dc_state * context,struct dc * dc) dce110_apply_single_controller_ctx_to_hw() argument
1783 power_down_encoders(struct dc * dc) power_down_encoders() argument
1810 power_down_controllers(struct dc * dc) power_down_controllers() argument
1820 power_down_clock_sources(struct dc * dc) power_down_clock_sources() argument
1835 power_down_all_hw_blocks(struct dc * dc) power_down_all_hw_blocks() argument
1848 disable_vga_and_power_gate_all_controllers(struct dc * dc) disable_vga_and_power_gate_all_controllers() argument
1893 get_edp_links_with_sink(struct dc * dc,struct dc_link ** edp_links_with_sink,int * edp_with_sink_num) get_edp_links_with_sink() argument
1911 clean_up_dsc_blocks(struct dc * dc) clean_up_dsc_blocks() argument
1957 dc_hwss_enable_otg_pwa(struct dc * dc,struct pipe_ctx * pipe_ctx) dc_hwss_enable_otg_pwa() argument
1992 dce110_enable_accelerated_mode(struct dc * dc,struct dc_state * context) dce110_enable_accelerated_mode() argument
2139 dce110_set_displaymarks(const struct dc * dc,struct dc_state * context) dce110_set_displaymarks() argument
2275 struct dc *dc = pipe_ctx[0]->stream->ctx->dc; set_static_screen_control() local
2290 should_enable_fbc(struct dc * dc,struct dc_state * context,uint32_t * pipe_idx) should_enable_fbc() argument
2356 enable_fbc(struct dc * dc,struct dc_state * context) enable_fbc() argument
2380 dce110_reset_hw_ctx_wrap(struct dc * dc,struct dc_state * context) dce110_reset_hw_ctx_wrap() argument
2452 dce110_setup_audio_dto(struct dc * dc,struct dc_state * context) dce110_setup_audio_dto() argument
2543 dce110_apply_ctx_to_hw(struct dc * dc,struct dc_state * context) dce110_apply_ctx_to_hw() argument
2695 program_surface_visibility(const struct dc * dc,struct pipe_ctx * pipe_ctx) program_surface_visibility() argument
2741 update_plane_addr(const struct dc * dc,struct pipe_ctx * pipe_ctx) update_plane_addr() argument
2780 dce110_power_down(struct dc * dc) dce110_power_down() argument
2825 dce110_enable_timing_synchronization(struct dc * dc,struct dc_state * state,int group_index,int group_size,struct pipe_ctx * grouped_pipes[]) dce110_enable_timing_synchronization() argument
2874 dce110_enable_per_frame_crtc_position_reset(struct dc * dc,int group_size,struct pipe_ctx * grouped_pipes[]) dce110_enable_per_frame_crtc_position_reset() argument
2906 dce110_init_pipes(struct dc * dc,struct dc_state * context) dce110_init_pipes() argument
2913 dce110_init_hw(struct dc * dc) dce110_init_hw() argument
2993 dce110_prepare_bandwidth(struct dc * dc,struct dc_state * context) dce110_prepare_bandwidth() argument
3007 dce110_optimize_bandwidth(struct dc * dc,struct dc_state * context) dce110_optimize_bandwidth() argument
3022 dce110_program_front_end_for_pipe(struct dc * dc,struct pipe_ctx * pipe_ctx) dce110_program_front_end_for_pipe() argument
3132 dce110_apply_ctx_for_surface(struct dc * dc,const struct dc_stream_state * stream,int num_planes,struct dc_state * context) dce110_apply_ctx_for_surface() argument
3172 dce110_post_unlock_program_front_end(struct dc * dc,struct dc_state * context) dce110_post_unlock_program_front_end() argument
3179 dce110_power_down_fe(struct dc * dc,struct dc_state * state,struct pipe_ctx * pipe_ctx) dce110_power_down_fe() argument
3198 dce110_wait_for_mpcc_disconnect(struct dc * dc,struct resource_pool * res_pool,struct pipe_ctx * pipe_ctx) dce110_wait_for_mpcc_disconnect() argument
3208 program_output_csc(struct dc * dc,struct pipe_ctx * pipe_ctx,enum dc_color_space colorspace,uint16_t * matrix,int opp_id) program_output_csc() argument
3305 struct dc *dc = link->ctx->dc; dce110_set_backlight_level() local
3403 struct dc *dc = link->ctx->dc; dce110_enable_dp_link_output() local
3472 struct dc *dc = link->ctx->dc; dce110_disable_link_output() local
3558 dce110_hw_sequencer_construct(struct dc * dc) dce110_hw_sequencer_construct() argument
[all...] |
| /linux/drivers/clk/mvebu/ |
| H A D | dove-divider.c | 51 static unsigned int dove_get_divider(struct dove_clk *dc) in dove_get_divider() argument
56 val = readl_relaxed(dc->base + DIV_CTRL0); in dove_get_divider()
57 val >>= dc->div_bit_start; in dove_get_divider()
59 divider = val & ~(~0 << dc->div_bit_size); in dove_get_divider()
61 if (dc->divider_table) in dove_get_divider()
62 divider = dc->divider_table[divider]; in dove_get_divider()
67 static int dove_calc_divider(const struct dove_clk *dc, unsigned long rate, in dove_calc_divider() argument
74 if (dc->divider_table) { in dove_calc_divider()
77 for (i = 0; dc->divider_table[i]; i++) in dove_calc_divider()
78 if (divider == dc->divider_table[i]) { in dove_calc_divider()
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| H A D | dcn20_fpu.h | 31 void dcn20_populate_dml_writeback_from_context(struct dc *dc,
39 void dcn20_calculate_dlg_params(struct dc *dc,
44 int dcn20_populate_dml_pipes_from_context(struct dc *dc,
48 void dcn20_calculate_wm(struct dc *dc,
57 void dcn20_update_bounding_box(struct dc *dc,
62 void dcn20_patch_bounding_box(struct dc *dc,
64 bool dcn20_validate_bandwidth_fp(struct dc *dc, struct dc_state *context,
75 int dcn21_populate_dml_pipes_from_context(struct dc *dc,
79 bool dcn21_validate_bandwidth_fp(struct dc *dc, struct dc_state *context, enum
81 void dcn21_update_bw_bounding_box_fpu(struct dc *dc, struct clk_bw_params *bw_params);
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn321/ |
| H A D | dcn321_resource.c | 28 #include "dc.h"
815 ctx->dc->caps.extended_aux_timeout_support); in dcn321_i2c_hw_create()
932 ctx->dc->dml.ip.det_buffer_size_kbytes, in dcn321_hubp_create()
933 ctx->dc->dml.ip.pixel_chunk_size_kbytes, in dcn321_hubp_create()
934 ctx->dc->dml.ip.config_return_buffer_size_in_kbytes); in dcn321_hubp_create()
1640 struct dc *dc = pool->base.oem_device->ctx->dc;
1642 dc->link_srv->destroy_ddc_service(&pool->base.oem_device);
1656 dm_error("DC
1513 struct dc *dc = pool->base.oem_device->ctx->dc; dcn321_resource_destruct() local
1615 dcn321_update_bw_bounding_box(struct dc * dc,struct clk_bw_params * bw_params) dcn321_update_bw_bounding_box() argument
1671 dcn321_resource_construct(uint8_t num_virtual_links,struct dc * dc,struct dcn321_resource_pool * pool) dcn321_resource_construct() argument
2104 dcn321_create_resource_pool(const struct dc_init_data * init_data,struct dc * dc) dcn321_create_resource_pool() argument
[all...] |
| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn201/ |
| H A D | dcn201_hwseq.c | 53 dc->ctx->logger
136 void dcn201_update_plane_addr(const struct dc *dc, struct pipe_ctx *pipe_ctx) in dcn201_update_plane_addr() argument
141 struct dce_hwseq *hws = dc->hwseq; in dcn201_update_plane_addr()
168 struct dc *dc, in dcn201_init_blank() argument
171 struct dce_hwseq *hws = dc->hwseq; in dcn201_init_blank()
180 color_space_to_black_color(dc, color_space, &black_color); in dcn201_init_blank()
189 ASSERT(opp_id_src0 < dc->res_pool->res_cap->num_opp); in dcn201_init_blank()
190 opp = dc->res_pool->opps[opp_id_src0]; in dcn201_init_blank()
227 void dcn201_init_hw(struct dc *dc) in dcn201_init_hw() argument
230 struct dce_hwseq *hws = dc->hwseq; in dcn201_init_hw()
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| H A D | dcn32_fpu.c | 183 static bool dcn32_apply_merge_split_flags_helper(struct dc *dc, struct dc_state *context,
189 double pstate_latency_us = clk_mgr->base.ctx->dc->dml.soc.dram_clock_change_latency_us; in dcn32_build_wm_range_table_fpu()
190 double fclk_change_latency_us = clk_mgr->base.ctx->dc->dml.soc.fclk_change_latency_us; in dcn32_build_wm_range_table_fpu()
191 double sr_exit_time_us = clk_mgr->base.ctx->dc->dml.soc.sr_exit_time_us; in dcn32_build_wm_range_table_fpu()
192 double sr_enter_plus_exit_time_us = clk_mgr->base.ctx->dc->dml.soc.sr_enter_plus_exit_time_us; in dcn32_build_wm_range_table_fpu()
198 (uint16_t)clk_mgr->base.ctx->dc->dml.soc.clock_limits[2].dcfclk_mhz; in dcn32_build_wm_range_table_fpu()
238 if (clk_mgr->base.ctx->dc->bb_overrides.dummy_clock_change_latency_ns != 0x7FFFFFFF) { in dcn32_build_wm_range_table_fpu()
278 int dcn32_find_dummy_latency_index_for_fw_based_mclk_switch(struct dc *dc, in dcn32_find_dummy_latency_index_for_fw_based_mclk_switch()
275 dcn32_find_dummy_latency_index_for_fw_based_mclk_switch(struct dc * dc,struct dc_state * context,display_e2e_pipe_params_st * pipes,int pipe_cnt,int vlevel) dcn32_find_dummy_latency_index_for_fw_based_mclk_switch() argument
333 dcn32_helper_populate_phantom_dlg_params(struct dc * dc,struct dc_state * context,display_e2e_pipe_params_st * pipes,int pipe_cnt) dcn32_helper_populate_phantom_dlg_params() argument
466 dcn32_set_phantom_stream_timing(struct dc * dc,struct dc_state * context,struct pipe_ctx * ref_pipe,struct dc_stream_state * phantom_stream,display_e2e_pipe_params_st * pipes,unsigned int pipe_cnt,unsigned int dc_pipe_idx) dcn32_set_phantom_stream_timing() argument
558 dcn32_get_num_free_pipes(struct dc * dc,struct dc_state * context) dcn32_get_num_free_pipes() argument
599 dcn32_assign_subvp_pipe(struct dc * dc,struct dc_state * context,unsigned int * index) dcn32_assign_subvp_pipe() argument
680 dcn32_enough_pipes_for_subvp(struct dc * dc,struct dc_state * context) dcn32_enough_pipes_for_subvp() argument
726 subvp_subvp_schedulable(struct dc * dc,struct dc_state * context) subvp_subvp_schedulable() argument
797 subvp_drr_schedulable(struct dc * dc,struct dc_state * context) subvp_drr_schedulable() argument
898 subvp_vblank_schedulable(struct dc * dc,struct dc_state * context) subvp_vblank_schedulable() argument
985 subvp_subvp_admissable(struct dc * dc,struct dc_state * context) subvp_subvp_admissable() argument
1037 subvp_validate_static_schedulability(struct dc * dc,struct dc_state * context,int vlevel) subvp_validate_static_schedulability() argument
1093 assign_subvp_index(struct dc * dc,struct dc_state * context) assign_subvp_index() argument
1200 update_pipe_slice_table_with_split_flags(struct pipe_slice_table * table,struct dc * dc,struct dc_state * context,struct vba_vars_st * vba,int split[MAX_PIPES],bool merge[MAX_PIPES]) update_pipe_slice_table_with_split_flags() argument
1267 update_pipes_with_slice_table(struct dc * dc,struct dc_state * context,struct pipe_slice_table * table) update_pipes_with_slice_table() argument
1285 update_pipes_with_split_flags(struct dc * dc,struct dc_state * context,struct vba_vars_st * vba,int split[MAX_PIPES],bool merge[MAX_PIPES]) update_pipes_with_split_flags() argument
1300 should_apply_odm_power_optimization(struct dc * dc,struct dc_state * context,struct vba_vars_st * v,int * split,bool * merge) should_apply_odm_power_optimization() argument
1394 try_odm_power_optimization_and_revalidate(struct dc * dc,struct dc_state * context,display_e2e_pipe_params_st * pipes,int * split,bool * merge,unsigned int * vlevel,int pipe_cnt) try_odm_power_optimization_and_revalidate() argument
1437 dcn32_full_validate_bw_helper(struct dc * dc,struct dc_state * context,display_e2e_pipe_params_st * pipes,int * vlevel,int * split,bool * merge,int * pipe_cnt,bool * repopulate_pipes) dcn32_full_validate_bw_helper() argument
1600 is_dtbclk_required(struct dc * dc,struct dc_state * context) is_dtbclk_required() argument
1613 dcn32_calculate_dlg_params(struct dc * dc,struct dc_state * context,display_e2e_pipe_params_st * pipes,int pipe_cnt,int vlevel) dcn32_calculate_dlg_params() argument
1773 dcn32_find_split_pipe(struct dc * dc,struct dc_state * context,int old_index) dcn32_find_split_pipe() argument
1815 dcn32_split_stream_for_mpc_or_odm(const struct dc * dc,struct resource_context * res_ctx,struct pipe_ctx * pri_pipe,struct pipe_ctx * sec_pipe,bool odm) dcn32_split_stream_for_mpc_or_odm() argument
1901 dcn32_apply_merge_split_flags_helper(struct dc * dc,struct dc_state * context,bool * repopulate_pipes,int * split,bool * merge) dcn32_apply_merge_split_flags_helper() argument
2101 dcn32_internal_validate_bw(struct dc * dc,struct dc_state * context,display_e2e_pipe_params_st * pipes,int * pipe_cnt_out,int * vlevel_out,enum dc_validate_mode validate_mode) dcn32_internal_validate_bw() argument
2265 dcn32_calculate_wm_and_dlg_fpu(struct dc * dc,struct dc_state * context,display_e2e_pipe_params_st * pipes,int pipe_cnt,int vlevel) dcn32_calculate_wm_and_dlg_fpu() argument
3014 dcn32_update_bw_bounding_box_fpu(struct dc * dc,struct clk_bw_params * bw_params) dcn32_update_bw_bounding_box_fpu() argument
3396 dcn32_allow_subvp_high_refresh_rate(struct dc * dc,struct dc_state * context,struct pipe_ctx * pipe) dcn32_allow_subvp_high_refresh_rate() argument
3452 dcn32_determine_max_vratio_prefetch(struct dc * dc,struct dc_state * context) dcn32_determine_max_vratio_prefetch() argument
3487 dcn32_assign_fpo_vactive_candidate(struct dc * dc,const struct dc_state * context,struct dc_stream_state ** fpo_candidate_stream) dcn32_assign_fpo_vactive_candidate() argument
3524 dcn32_find_vactive_pipe(struct dc * dc,const struct dc_state * context,struct dc_stream_state * fpo_candidate_stream,uint32_t vactive_margin_req_us) dcn32_find_vactive_pipe() argument
3565 dcn32_override_min_req_memclk(struct dc * dc,struct dc_state * context) dcn32_override_min_req_memclk() argument
[all...] |
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn303/ |
| H A D | dcn303_resource.c | 81 dc->ctx->logger
797 dm_error("DC: failed to create dwbc30!\n");
832 dm_error("DC: failed to create mcif_wb30!\n");
872 &aux_engine_regs[inst], &aux_mask, &aux_shift, ctx->dc->caps.extended_aux_timeout_support); in dcn303_link_encoder_create()
1010 static bool is_soc_bounding_box_valid(struct dc *dc) in dcn303_resource_destruct()
1012 uint32_t hw_internal_rev = dc->ctx->asic_id.hw_internal_rev; in dcn303_resource_destruct()
1020 static bool init_soc_bounding_box(struct dc *dc, struct resource_pool *pool) in dcn303_resource_destruct()
1025 DC_LOGGER_INIT(dc in dcn303_resource_destruct()
921 is_soc_bounding_box_valid(struct dc * dc) is_soc_bounding_box_valid() argument
931 init_soc_bounding_box(struct dc * dc,struct resource_pool * pool) init_soc_bounding_box() argument
1090 struct dc *dc = pool->oem_device->ctx->dc; dcn303_resource_destruct() local
1108 dcn303_update_bw_bounding_box(struct dc * dc,struct clk_bw_params * bw_params) dcn303_update_bw_bounding_box() argument
1179 dcn303_resource_construct(uint8_t num_virtual_links,struct dc * dc,struct resource_pool * pool) dcn303_resource_construct() argument
1488 dcn303_create_resource_pool(const struct dc_init_data * init_data,struct dc * dc) dcn303_create_resource_pool() argument
[all...] |
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| H A D | dcn32_resource.c | 29 #include "dc.h"
827 ctx->dc->caps.extended_aux_timeout_support); in dcn32_i2c_hw_create()
944 ctx->dc->dml.ip.det_buffer_size_kbytes, in dcn32_hubp_create()
945 ctx->dc->dml.ip.pixel_chunk_size_kbytes, in dcn32_hubp_create()
946 ctx->dc->dml.ip.config_return_buffer_size_in_kbytes); in dcn32_hubp_create()
1666 struct dc *dc = pool->base.oem_device->ctx->dc; in dcn32_release_post_bldn_3dlut()
1668 dc->link_srv->destroy_ddc_service(&pool->base.oem_device); in dcn32_release_post_bldn_3dlut()
1682 dm_error("DC in dcn32_enable_phantom_plane()
1538 struct dc *dc = pool->base.oem_device->ctx->dc; dcn32_resource_destruct() local
1679 dcn32_enable_phantom_plane(struct dc * dc,struct dc_state * context,struct dc_stream_state * phantom_stream,unsigned int dc_pipe_idx) dcn32_enable_phantom_plane() argument
1724 dcn32_enable_phantom_stream(struct dc * dc,struct dc_state * context,display_e2e_pipe_params_st * pipes,unsigned int pipe_cnt,unsigned int dc_pipe_idx) dcn32_enable_phantom_stream() argument
1752 dcn32_add_phantom_pipes(struct dc * dc,struct dc_state * context,display_e2e_pipe_params_st * pipes,unsigned int pipe_cnt,unsigned int index) dcn32_add_phantom_pipes() argument
1786 dml1_validate(struct dc * dc,struct dc_state * context,enum dc_validate_mode validate_mode) dml1_validate() argument
1854 dcn32_validate_bandwidth(struct dc * dc,struct dc_state * context,enum dc_validate_mode validate_mode) dcn32_validate_bandwidth() argument
1907 dcn32_populate_dml_pipes_from_context(struct dc * dc,struct dc_state * context,display_e2e_pipe_params_st * pipes,enum dc_validate_mode validate_mode) dcn32_populate_dml_pipes_from_context() argument
2067 dcn32_calculate_mall_ways_from_bytes(const struct dc * dc,unsigned int total_size_in_mall_bytes) dcn32_calculate_mall_ways_from_bytes() argument
2096 dcn32_calculate_wm_and_dlg(struct dc * dc,struct dc_state * context,display_e2e_pipe_params_st * pipes,int pipe_cnt,int vlevel) dcn32_calculate_wm_and_dlg() argument
2106 dcn32_update_bw_bounding_box(struct dc * dc,struct clk_bw_params * bw_params) dcn32_update_bw_bounding_box() argument
2121 dcn32_get_max_hw_cursor_size(const struct dc * dc,struct dc_state * state,const struct dc_stream_state * stream) dcn32_get_max_hw_cursor_size() argument
2174 dcn32_resource_construct(uint8_t num_virtual_links,struct dc * dc,struct dcn32_resource_pool * pool) dcn32_resource_construct() argument
2620 dcn32_create_resource_pool(const struct dc_init_data * init_data,struct dc * dc) dcn32_create_resource_pool() argument
2930 dcn32_calc_num_avail_chans_for_mall(struct dc * dc,int num_chans) dcn32_calc_num_avail_chans_for_mall() argument
[all...] |