Searched full:da8xx (Results 1 – 12 of 12) sorted by relevance
1 * Device tree bindings for Texas Instruments da8xx master peripheral4 DA8XX SoCs feature a set of registers allowing to change the priority of all
1 * Device tree bindings for Texas Instruments da8xx DDR2/mDDR memory controller3 The DDR2/mDDR memory controller present on Texas Instruments da8xx SoCs features
4 $id: http://devicetree.org/schemas/memory-controllers/ti,da8xx-ddrctl.yaml#7 title: Texas Instruments da8xx DDR2/mDDR memory controller
1 TI DA8xx/OMAP-L1xx/AM18xx USB PHY8 controllers on DA8xx SoCs. Consumers of this device should use index 0 for
7 title: TI DA8xx/OMAP-L1xx/AM18xx USB PHY14 controllers on DA8xx SoCs.
1 TI DA8xx MUSB3 For DA8xx/OMAP-L1x/AM17xx/AM18xx platforms.
1 DA8XX USB OHCI controller
1 Binding for TI DA8XX/OMAP-L13X/AM17XX/AM18XX CFGCHIP clocks3 TI DA8XX/OMAP-L13X/AM17XX/AM18XX SoCs contain a general purpose set of
5 - "ti,da830-rtc" - for RTC IP used similar to that on DA8xx SoC family.
4 - compatible : "ti,da830-evm-audio" : forDM365/DA8xx/OMAPL1x/AM33xx
14 - "ti,da830-spi" for SPI used similar to that on DA8xx SoC family
178 * valid. Unfortunately due to a problem with the DA8XX OHCI controller, we