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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMProcessors.td4 //===----------------------------------------------------------------------===//
9 "Cortex-A5 ARM processors", []>;
11 "Cortex-A7 ARM processors", []>;
13 "Cortex-A8 ARM processors", []>;
15 "Cortex-A9 ARM processors", []>;
17 "Cortex-A12 ARM processors", []>;
19 "Cortex-A15 ARM processors", []>;
21 "Cortex-A17 ARM processors", []>;
23 "Cortex-A32 ARM processors", []>;
25 "Cortex-A35 ARM processors", []>;
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/freebsd/sys/contrib/device-tree/Bindings/arm/
H A Drenesas.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas SH-Mobile, R-Mobile, and R-Car Platform
10 - Geert Uytterhoeven <geert+renesas@glider.be>
17 - description: Emma Mobile EV2
19 - enum:
20 - renesas,kzm9d # Kyoto Microcomputer Co. KZM-A9-Dual
21 - const: renesas,emev2
23 - description: RZ/A1H (R7S72100)
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H A Dcpus.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
21 with updates for 32-bit and 64-bit ARM systems provided in this document.
30 - square brackets define bitfields, eg reg[7:0] value of the bitfield in
59 On 32-bit ARM v7 or later systems this property is
68 On ARM v8 64-bit systems this property is required
71 * If cpus node's #address-cells property is set to 2
79 * If cpus node's #address-cells property is set to 1
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/freebsd/sys/contrib/device-tree/Bindings/soc/renesas/
H A Drenesas.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas SH-Mobile, R-Mobile, and R-Car Platform
10 - Geert Uytterhoeven <geert+renesas@glider.be>
17 - description: Emma Mobile EV2
19 - enum:
20 - renesas,kzm9d # Kyoto Microcomputer Co. KZM-A9-Dual
21 - const: renesas,emev2
23 - description: RZ/A1H (R7S72100)
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/freebsd/sys/contrib/device-tree/Bindings/remoteproc/
H A Dwkup_m3_rproc.txt1 TI Wakeup M3 Remoteproc Driver
4 The TI AM33xx and AM43xx family of devices use a small Cortex M3 co-processor
5 (commonly referred to as Wakeup M3 or CM3) to help with various low power tasks
10 Wkup M3 Device Node:
12 A wkup_m3 device node is used to represent the Wakeup M3 processor instance
17 --------------------
18 - compatible: Should be one of,
19 "ti,am3352-wkup-m3" for AM33xx SoCs
20 "ti,am4372-wkup-m3" for AM43xx SoCs
21 - reg: Should contain the address ranges for the two internal
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H A Dqcom,rpm-proc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,rpm-proc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Konrad Dybcio <konradybcio@kernel.org>
12 - Stephan Gerhold <stephan@gerhold.net>
17 +--------------------------------------------+
18 | RPM subsystem (qcom,rpm-proc) |
20 reset | +---------------+ +-----+ +-----+ |
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H A Dti,omap-remoteproc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,omap-remotepro
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/freebsd/sys/contrib/device-tree/Bindings/soc/ti/
H A Dwkup_m3_ipc.txt1 Wakeup M3 IPC Driver
4 The TI AM33xx and AM43xx family of devices use a small Cortex M3 co-processor
5 (commonly referred to as Wakeup M3 or CM3) to help with various low power tasks
7 C-states for CPU Idle. Once the wkup_m3_ipc driver uses the wkup_m3_rproc driver
12 Wkup M3 Device Node:
18 --------------------
19 - compatible: Should be,
20 "ti,am3352-wkup-m3-ipc" for AM33xx SoCs
21 "ti,am4372-wkup-m3-ipc" for AM43xx SoCs
22 - reg: Contains the IPC register address space to communicate
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H A Dwkup-m3-ipc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/ti/wkup-m3-ipc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Wakeup M3 IPC device
10 - Dave Gerlach <d-gerlach@ti.com>
11 - Drew Fustini <dfustini@baylibre.com>
14 The TI AM33xx and AM43xx family of devices use a small Cortex M3 co-processor
15 (commonly referred to as Wakeup M3 or CM3) to help with various low power tasks
17 C-states for CPU Idle. Once the wkup_m3_ipc driver uses the wkup_m3_rproc driver
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/freebsd/contrib/llvm-project/llvm/include/llvm/Support/
H A DARMBuildAttributes.h1 //===-- ARMBuildAttributes.h - ARM Build Attributes -------------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 // ELF for the ARM Architecture r2.09 - November 30, 2012
16 //===----------------------------------------------------------------------===//
103 v7 = 10, // e.g. Cortex A8, Cortex M3
104 v6_M = 11, // e.g. Cortex M1
108 v8_R = 15, // e.g. Cortex R52
116 Not_Applicable = 0, // pre v7, or cross-profile code
117 ApplicationProfile = (0x41), // 'A' (e.g. for Cortex A8)
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/freebsd/contrib/opencsd/decoder/source/
H A Dtrc_core_arch_map.cpp44 { "Cortex-A77", { ARCH_V8r3, profile_CortexA } },
45 { "Cortex-A76", { ARCH_V8r3, profile_CortexA } },
46 { "Cortex-A75", { ARCH_V8r3, profile_CortexA } },
47 { "Cortex-A73", { ARCH_V8, profile_CortexA } },
48 { "Cortex-A72", { ARCH_V8, profile_CortexA } },
49 { "Cortex-A65", { ARCH_V8r3, profile_CortexA } },
50 { "Cortex-A57", { ARCH_V8, profile_CortexA } },
51 { "Cortex-A55", { ARCH_V8r3, profile_CortexA } },
52 { "Cortex-A53", { ARCH_V8, profile_CortexA } },
53 { "Cortex-A35", { ARCH_V8, profile_CortexA } },
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64Processors.td1 //=- AArch64Processors.td - Describe AArch64 Processors ------*- tablegen -*-=//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
10 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
14 //===----------------------------------------------------------------------===//
18 "Cortex-A35 ARM processors">;
21 "Cortex-A53 ARM processors", [
28 "Cortex-A55 ARM processors", [
35 "Cortex-A510 ARM processors", [
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/freebsd/sys/contrib/device-tree/Bindings/mailbox/
H A Dxgene-slimpro-mailbox.txt1 The APM X-Gene SLIMpro mailbox is used to communicate messages between
2 the ARM64 processors and the Cortex M3 (dubbed SLIMpro). It uses a simple
10 - compatible: Should be as "apm,xgene-slimpro-mbox".
12 - reg: Contains the mailbox register address range.
14 - interrupts: 8 interrupts must be from 0 to 7, interrupt 0 define the
18 - #mbox-cells: only one to specify the mailbox channel number.
24 compatible = "apm,xgene-slimpro-mbox";
26 #mbox-cells = <1>;
/freebsd/contrib/llvm-project/llvm/include/llvm/TargetParser/
H A DARMTargetParser.def1 //===- ARMTargetParser.def - ARM target parsing defines ---------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
28 ARM_FPU("vfpv3-fp16", FK_VFPV3_FP16, FPUVersion::VFPV3_FP16,
30 ARM_FPU("vfpv3-d16", FK_VFPV3_D16, FPUVersion::VFPV3, NeonSupportLevel::None,
32 ARM_FPU("vfpv3-d16-fp16", FK_VFPV3_D16_FP16, FPUVersion::VFPV3_FP16,
36 ARM_FPU("vfpv3xd-fp16", FK_VFPV3XD_FP16, FPUVersion::VFPV3_FP16,
40 ARM_FPU("vfpv4-d16", FK_VFPV4_D16, FPUVersion::VFPV4, NeonSupportLevel::None,
42 ARM_FPU("fpv4-sp-d16", FK_FPV4_SP_D16, FPUVersion::VFPV4,
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/freebsd/contrib/bearssl/src/
H A Dconfig.h29 * This file contains compile-time flags that can override the
32 * non-zero integer (normally 1). If the macro is not defined, then
37 * When BR_64 is enabled, 64-bit integer types are assumed to be
38 * efficient (i.e. the architecture has 64-bit registers and can
39 * do 64-bit operations as fast as 32-bit operations).
45 * When BR_LOMUL is enabled, then multiplications of 32-bit values whose
47 * substantially more efficient than 32-bit multiplications that yield
48 * 64-bit results. This is typically the case on low-end ARM Cortex M
49 * systems (M0, M0+, M1, and arguably M3 and M4 as well).
64 * When BR_SLOW_MUL15 is enabled, short multplications (on 15-bit words)
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/freebsd/contrib/llvm-project/llvm/lib/TargetParser/
H A DHost.cpp1 //===-- Host.cpp - Implement OS Host Detection ------------------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
18 #include "llvm/Config/llvm-config.h"
25 // Include the platform-specific parts of this class.
54 #define DEBUG_TYPE "host-detection"
56 //===----------------------------------------------------------------------===//
60 //===----------------------------------------------------------------------===//
78 // and so we must use an operating-system interface to determine the current in getHostCPUNameForPowerPC()
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/freebsd/contrib/llvm-project/lldb/source/Utility/
H A DArchSpec.cpp1 //===-- ArchSpec.cpp ------------------------------------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
14 #include "lldb/lldb-defines.h"
193 ArchSpec::eCore_ppc64_ppc970_64, "ppc970-64"},
234 ArchSpec::eCore_uknownMach32, "unknown-mach-32"},
236 ArchSpec::eCore_uknownMach64, "unknown-mach-64"},
279 //===----------------------------------------------------------------------===//
286 // clang-format off
348 // Catch any unknown mach architectures so we can always use the object and symbol mach-o files
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/freebsd/crypto/libecc/
H A DREADME.md11 Copyright (C) 2017-2023
20 * Jean-Pierre FLORI (<mailto:jpflori@gmail.com>)
30 in the [ISO 14888-3:2018](https://www.iso.org/standard/76382.html)
34 * Core ISO 14888-3:2018 algorithms: ECDSA, ECKCDSA, ECGDSA, ECRDSA, EC{,O}SDSA, ECFSDSA, SM2.
36 …* BIGN (as standardized in [STB 34.101.45-2013](https://github.com/bcrypto/bign)). We allow a more…
38 … "Schnorr" Bitcoin proposal, as specified in [bip-0340](https://github.com/bitcoin/bips/blob/maste…
39 …tandard as we allow any curve and any hash function (the standard mandates SECP256K1 with SHA-256).
42 …-CDH (Elliptic Curve Cryptography Cofactor Diffie-Hellman) as described in [section 5.7.1.2 of the…
45 …STR3410-2001-CryptoPro{A,B,C,XchA,XchB,Test}-ParamSet, GOSTR3410-2012-{256,512}-ParamSet{A,B,C}, G…
47 * **Hash functions**: SHA-2 and SHA-3 hash functions (224, 256, 384, 512), SM3, RIPEMD-160,
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/freebsd/crypto/openssl/crypto/bn/asm/
H A Darmv8-mont.pl2 # Copyright 2015-2025 The OpenSSL Project Authors. All Rights Reserved.
20 # work. While it does improve RSA sign performance by 20-30% (less for
22 # faster and RSA4096 goes 15-20% slower on Cortex-A57. Multiplication
28 # compiler-generated code. Recall that compiler is instructed to use
36 # RSA/DSA performance by 25-40-60% depending on processor and key
38 # comparison to compiler-generated code. On Cortex-A57 improvement
40 # 50-70% improvement for RSA4096 sign. RSA2048 sign is ~25% faster
41 # on Cortex-A57 and ~60-100% faster on others.
49 ( $xlate="${dir}arm-xlate.pl" and -f $xlate ) or
50 ( $xlate="${dir}../../perlasm/arm-xlate.pl" and -f $xlate) or
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/freebsd/contrib/bearssl/samples/
H A Dcustom_profile.c41 * respectively. Of course, in a typical size-constrained application,
108 br_ssl_engine_set_versions(&cc->eng, BR_TLS10, BR_TLS12); in example_client_profile()
114 * -- cipher suites with a name ending in "SHA384" need "prf_sha384"; in example_client_profile()
115 * -- all others need "prf_sha256". in example_client_profile()
118 * use SHA-1 for the per-record MAC (that's what the final "SHA" in example_client_profile()
119 * means), but still SHA-256 for the PRF when selected along with in example_client_profile()
120 * the TLS-1.2 protocol version. in example_client_profile()
122 br_ssl_engine_set_prf10(&cc->eng, &br_tls10_prf); in example_client_profile()
123 br_ssl_engine_set_prf_sha256(&cc->eng, &br_tls12_sha256_prf); in example_client_profile()
124 br_ssl_engine_set_prf_sha384(&cc->eng, &br_tls12_sha384_prf); in example_client_profile()
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/freebsd/contrib/bearssl/src/symcipher/
H A Dpoly1305_ctmul32.c34 * Implementation notes: we split the 130-bit values into ten in poly1305_inner()
35 * 13-bit words. This gives us some space for carries and allows in poly1305_inner()
36 * using only 32x32->32 multiplications, which are way faster than in poly1305_inner()
37 * 32x32->64 multiplications on the ARM Cortex-M0/M0+, and also in poly1305_inner()
38 * help in making constant-time code on the Cortex-M3. in poly1305_inner()
40 * Since we compute modulo 2^130-5, the "upper words" become in poly1305_inner()
45 * In each loop iteration, a[] and r[] words are 13-bit each, in poly1305_inner()
58 * If there is a partial block, right-pad it with zeros. in poly1305_inner()
108 * a 32-bit word and still have some room for carries. in poly1305_inner()
116 * (they are 5 times a 13-bit word) so the full summation in poly1305_inner()
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/freebsd/sys/contrib/device-tree/src/arm/renesas/
H A Dsh73a0.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the SH-Mobile AG5 (R8A73A00/SH73A0) SoC
8 #include <dt-bindings/clock/sh73a0-clock.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
14 interrupt-parent = <&gic>;
15 #address-cells = <1>;
16 #size-cells = <1>;
19 #address-cells = <1>;
20 #size-cells = <0>;
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H A Dr8a7740.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Mobile A1 (R8A77400) SoC
8 #include <dt-bindings/clock/r8a7740-clock.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
14 interrupt-parent = <&gic>;
15 #address-cells = <1>;
16 #size-cells = <1>;
19 #address-cells = <1>;
20 #size-cells = <0>;
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/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Dam33xx.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/pinctrl/am33xx.h>
11 #include <dt-bindings/clock/am3.h>
15 interrupt-parent = <&intc>;
16 #address-cells = <1>;
17 #size-cells = <1>;
30 d-can0 = &dcan0;
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/freebsd/sys/contrib/device-tree/src/arm/nxp/lpc/
H A Dlpc18xx.dtsi9 * Released under the terms of 3-clause BSD License
14 #include "../../armv7-m.dtsi"
16 #include "dt-bindings/clock/lpc18xx-cgu.h"
17 #include "dt-bindings/clock/lpc18xx-ccu.h"
23 #address-cells = <1>;
24 #size-cells = <1>;
27 #address-cells = <1>;
28 #size-cell
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