Searched +full:cortex +full:- +full:a32 (Results 1 – 10 of 10) sorted by relevance
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMProcessors.td | 4 //===----------------------------------------------------------------------===// 9 "Cortex-A5 ARM processors", []>; 11 "Cortex-A7 ARM processors", []>; 13 "Cortex-A8 ARM processors", []>; 15 "Cortex-A9 ARM processors", []>; 17 "Cortex-A12 ARM processors", []>; 19 "Cortex-A15 ARM processors", []>; 21 "Cortex-A17 ARM processors", []>; 22 def ProcA32 : SubtargetFeature<"a32", "ARMProcFamily", "CortexA32", 23 "Cortex-A32 ARM processors", []>; [all …]
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/freebsd/sys/contrib/device-tree/Bindings/arm/ |
H A D | arm,corstone1000.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com> 11 - Hugues Kamba Mpiana <hugues.kambampiana@arm.com> 14 ARM's Corstone1000 includes pre-verified Corstone SSE-710 subsystem that 15 provides a flexible compute architecture that combines Cortex‑A and Cortex‑M 18 Support for Cortex‑A32, Cortex‑A35 and Cortex‑A53 processors. Two expansion 19 systems for M-Class (or other) processors for adding sensors, connectivity, 25 seamless integration of the optional CryptoCell™-312 cryptographic [all …]
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H A D | pmu.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Mark Rutland <mark.rutland@arm.com> 11 - Will Deacon <will.deacon@arm.com> 16 representation in the device tree should be done as under:- 21 - enum: 22 - apm,potenza-pmu 23 - apple,avalanche-pmu 24 - apple,blizzard-pmu [all …]
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H A D | cpus.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> 21 with updates for 32-bit and 64-bit ARM systems provided in this document. 30 - square brackets define bitfields, eg reg[7:0] value of the bitfield in 59 On 32-bit ARM v7 or later systems this property is 68 On ARM v8 64-bit systems this property is required 71 * If cpus node's #address-cells property is set to 2 79 * If cpus node's #address-cells property is set to 1 [all …]
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/freebsd/contrib/opencsd/decoder/source/ |
H A D | trc_core_arch_map.cpp | 44 { "Cortex-A77", { ARCH_V8r3, profile_CortexA } }, 45 { "Cortex-A76", { ARCH_V8r3, profile_CortexA } }, 46 { "Cortex-A75", { ARCH_V8r3, profile_CortexA } }, 47 { "Cortex-A73", { ARCH_V8, profile_CortexA } }, 48 { "Cortex-A72", { ARCH_V8, profile_CortexA } }, 49 { "Cortex-A65", { ARCH_V8r3, profile_CortexA } }, 50 { "Cortex-A57", { ARCH_V8, profile_CortexA } }, 51 { "Cortex-A55", { ARCH_V8r3, profile_CortexA } }, 52 { "Cortex-A53", { ARCH_V8, profile_CortexA } }, 53 { "Cortex-A35", { ARCH_V8, profile_CortexA } }, [all …]
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/freebsd/contrib/llvm-project/llvm/include/llvm/TargetParser/ |
H A D | ARMTargetParser.def | 1 //===- ARMTargetParser.def - ARM target parsing defines ---------*- C++ -*-===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 11 //===----------------------------------------------------------------------===// 28 ARM_FPU("vfpv3-fp16", FK_VFPV3_FP16, FPUVersion::VFPV3_FP16, 30 ARM_FPU("vfpv3-d16", FK_VFPV3_D16, FPUVersion::VFPV3, NeonSupportLevel::None, 32 ARM_FPU("vfpv3-d16-fp16", FK_VFPV3_D16_FP16, FPUVersion::VFPV3_FP16, 36 ARM_FPU("vfpv3xd-fp16", FK_VFPV3XD_FP16, FPUVersion::VFPV3_FP16, 40 ARM_FPU("vfpv4-d16", FK_VFPV4_D16, FPUVersion::VFPV4, NeonSupportLevel::None, 42 ARM_FPU("fpv4-sp-d16", FK_FPV4_SP_D16, FPUVersion::VFPV4, [all …]
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/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/ |
H A D | arm,gic-v3.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/interrupt-controller/arm,gic-v3.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Marc Zyngier <maz@kernel.org> 15 Software Generated Interrupts (SGI), and Locality-specific Peripheral 19 - $ref: /schemas/interrupt-controller.yaml# 24 - items: 25 - enum: 26 - qcom,msm8996-gic-v3 [all …]
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/freebsd/contrib/llvm-project/clang/lib/Driver/ToolChains/ |
H A D | Gnu.cpp | 1 //===--- Gnu.cpp - Gnu Tool and ToolChain Implementations -------*- C++ -*-===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 59 StringRef CPUArg(A->getValue()); in normalizeCPUNamesForAssembler() 61 CmdArgs.push_back("-mcpu=cortex-a15"); in normalizeCPUNamesForAssembler() 63 CmdArgs.push_back("-mcpu=cortex-a57"); in normalizeCPUNamesForAssembler() 78 if (forwardToGCC(A->getOption())) { in ConstructJob() 83 A->claim(); in ConstructJob() 85 A->render(Args, CmdArgs); in ConstructJob() 93 CmdArgs.push_back("-arch"); in ConstructJob() [all …]
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/freebsd/sys/contrib/zstd/lib/common/ |
H A D | xxhash.h | 2 * xxHash - Fast Hash algorithm 6 * - xxHash homepage: http://www.xxhash.com 7 * - xxHash source repository : https://github.com/Cyan4973/xxHash 9 * This source code is licensed under both the BSD-style license (found in the 12 * You may select, at your option, one of the above-listed licenses. 49 MD5-32 0.33 GB/s 10 Ronald L. Rivest 50 SHA1-32 0.28 GB/s 10 57 Other speed-oriented implementations can be faster, 59 https://fastcompression.blogspot.com/2019/03/presenting-xxh3.html?showComment=1552696407071#c349009… 61 A 64-bit version, named XXH64, is available since r35. [all …]
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/freebsd/share/misc/ |
H A D | usb_vendors | 6 # http://www.linux-usb.org/usb-ids.html 7 # or send entries as patches (diff -u old new) in the 10 # http://www.linux-usb.org/usb.ids 13 # Date: 2024-12-04 20:34:02 20 # device device_name <-- single tab 21 # interface interface_name <-- two tabs 38 5301 GW-US54ZGL 802.11bg 54 145f NW-3100 802.11b/g 54Mbps Wireless Network Adapter [zd1211] 62 0200 TP-Link 81 120e ASI120MC-S Planetary Camera [all …]
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