Home
last modified time | relevance | path

Searched full:ctl2 (Results 1 – 18 of 18) sorted by relevance

/linux/tools/testing/selftests/kvm/x86/
H A Ducna_injection_test.c79 u64 ctl2; in ucna_injection_guest_code() local
85 ctl2 = rdmsr(MSR_IA32_MCx_CTL2(UCNA_BANK)); in ucna_injection_guest_code()
86 wrmsr(MSR_IA32_MCx_CTL2(UCNA_BANK), ctl2 | MCI_CTL2_CMCI_EN); in ucna_injection_guest_code()
97 ctl2 = rdmsr(MSR_IA32_MCx_CTL2(UCNA_BANK)); in ucna_injection_guest_code()
98 wrmsr(MSR_IA32_MCx_CTL2(UCNA_BANK), ctl2 & ~MCI_CTL2_CMCI_EN); in ucna_injection_guest_code()
109 u64 ctl2 = rdmsr(MSR_IA32_MCx_CTL2(UCNA_BANK)); in cmci_disabled_guest_code() local
110 wrmsr(MSR_IA32_MCx_CTL2(UCNA_BANK), ctl2 | MCI_CTL2_CMCI_EN); in cmci_disabled_guest_code()
117 u64 ctl2 = rdmsr(MSR_IA32_MCx_CTL2(UCNA_BANK)); in cmci_enabled_guest_code() local
118 wrmsr(MSR_IA32_MCx_CTL2(UCNA_BANK), ctl2 | MCI_CTL2_RESERVED_BIT); in cmci_enabled_guest_code()
/linux/drivers/rtc/
H A Drtc-rs5c348.c79 txbuf[0] = RS5C348_CMD_R(RS5C348_REG_CTL2); /* cmd, ctl2 */ in rs5c348_rtc_set_time()
81 txbuf[2] = RS5C348_CMD_R(RS5C348_REG_CTL2); /* cmd, ctl2 */ in rs5c348_rtc_set_time()
124 txbuf[0] = RS5C348_CMD_R(RS5C348_REG_CTL2); /* cmd, ctl2 */ in rs5c348_rtc_read_time()
126 txbuf[2] = RS5C348_CMD_R(RS5C348_REG_CTL2); /* cmd, ctl2 */ in rs5c348_rtc_read_time()
H A Drtc-rzn1.c318 u32 subu = 0, ctl2; in rzn1_rtc_set_offset() local
352 ret = readl_poll_timeout(rtc->base + RZN1_RTC_CTL2, ctl2, in rzn1_rtc_set_offset()
353 !(ctl2 & RZN1_RTC_CTL2_WUST), 100, 2000000); in rzn1_rtc_set_offset()
/linux/drivers/hwmon/
H A Dlm93.c291 * The two PWM CTL2 registers can read something other than what was
1752 u8 ctl2, ctl4; in pwm_show() local
1755 ctl2 = data->block9[nr][LM93_PWM_CTL2]; in pwm_show()
1757 if (ctl2 & 0x01) /* show user commanded value if enabled */ in pwm_show()
1760 rc = LM93_PWM_FROM_REG(ctl2 >> 4, (ctl4 & 0x07) ? in pwm_show()
1771 u8 ctl2, ctl4; in pwm_store() local
1780 ctl2 = lm93_read_byte(client, LM93_REG_PWM_CTL(nr, LM93_PWM_CTL2)); in pwm_store()
1782 ctl2 = (ctl2 & 0x0f) | LM93_PWM_TO_REG(val, (ctl4 & 0x07) ? in pwm_store()
1785 data->pwm_override[nr] = LM93_PWM_FROM_REG(ctl2 >> 4, in pwm_store()
1788 lm93_write_byte(client, LM93_REG_PWM_CTL(nr, LM93_PWM_CTL2), ctl2); in pwm_store()
[all …]
/linux/drivers/gpu/drm/i915/display/
H A Ddvo_tfp410.c209 u8 ctl2; in tfp410_detect() local
211 if (tfp410_readb(dvo, TFP410_CTL_2, &ctl2)) { in tfp410_detect()
212 if (ctl2 & TFP410_CTL_2_RSEN) in tfp410_detect()
H A Dintel_backlight_regs.h79 /* PCH CTL1 is totally different, all but the below bits are reserved. CTL2 is
/linux/drivers/video/fbdev/
H A Darcfb.c394 unsigned char ctl2; in arcfb_ioctl() local
396 ctl2 = ks108_readb_ctl2(info->par); in arcfb_ioctl()
397 if (copy_to_user(argp, &ctl2, sizeof(ctl2))) in arcfb_ioctl()
/linux/drivers/dma/
H A Dpch_dma.c183 val = dma_readl(pd, CTL2); in pdc_enable_irq()
190 dma_writel(pd, CTL2, val); in pdc_enable_irq()
741 pd->regs.dma_ctl2 = dma_readl(pd, CTL2); in pch_dma_save_regs()
764 dma_writel(pd, CTL2, pd->regs.dma_ctl2); in pch_dma_restore_regs()
/linux/drivers/net/ethernet/aquantia/atlantic/hw_atl/
H A Dhw_atl_b0.c679 txd->ctl2 = 0; in hw_atl_b0_hw_ring_tx_xmit()
690 txd->ctl2 |= (buff->mss << 16); in hw_atl_b0_hw_ring_tx_xmit()
698 txd->ctl2 |= (buff->len_l4 << 8) | in hw_atl_b0_hw_ring_tx_xmit()
715 txd->ctl2 |= HW_ATL_B0_TXD_CTL2_LEN & (pkt_len << 14); in hw_atl_b0_hw_ring_tx_xmit()
719 txd->ctl2 |= HW_ATL_B0_TXD_CTL2_CTX_EN; in hw_atl_b0_hw_ring_tx_xmit()
/linux/sound/soc/codecs/
H A Dcs35l33.h25 #define CS35L33_BST_CTL2 0x0C /* Boost Converter CTL2 */
H A Dcs35l35.h28 #define CS35L35_SP_FMT_CTL2 0x0E /* Serial Port Format CTL2 */
/linux/sound/mips/
H A Dhal2.h141 /* Bits in CTL2 register */
/linux/drivers/net/ethernet/marvell/octeontx2/af/
H A Drvu_cpt.c957 u64 ctl, ctl2; in rvu_mbox_handler_cpt_lf_reset() local
970 ctl2 = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf)); in rvu_mbox_handler_cpt_lf_reset()
978 rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf), ctl2); in rvu_mbox_handler_cpt_lf_reset()
/linux/drivers/gpu/drm/loongson/
H A Dlsdc_regs.h323 * data island. The values of CTL0, CTL1, CTL2, and CTL3 indicate the type of
/linux/drivers/net/wireless/ath/ath9k/
H A Deeprom_4k.c124 PR_EEP("Ant. Diversity ctl2", modal_hdr->antdiv_ctl2); in ath9k_dump_4k_modal_eeprom()
/linux/drivers/spi/
H A Dspi-sprd.c82 /* Bits & mask definition for register CTL2 */
/linux/drivers/pci/
H A Dpci.c3678 u32 cap, ctl2; in pci_enable_atomic_ops_to_root() local
3720 &ctl2); in pci_enable_atomic_ops_to_root()
3721 if (ctl2 & PCI_EXP_DEVCTL2_ATOMIC_EGRESS_BLOCK) in pci_enable_atomic_ops_to_root()
/linux/drivers/mmc/host/
H A Dsdhci.c95 SDHCI_DUMP("Host ctl2: 0x%08x\n", in sdhci_dumpregs()