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Searched full:ctl1 (Results 1 – 18 of 18) sorted by relevance

/linux/drivers/rtc/
H A Drtc-rzn1.c150 u32 ctl1, set_irq_bits = 0; in rzn1_rtc_alarm_irq() local
160 ctl1 = readl(rtc->base + RZN1_RTC_CTL1); in rzn1_rtc_alarm_irq()
161 ctl1 &= ~RZN1_RTC_CTL1_ALME; in rzn1_rtc_alarm_irq()
162 ctl1 |= set_irq_bits; in rzn1_rtc_alarm_irq()
163 writel(ctl1, rtc->base + RZN1_RTC_CTL1); in rzn1_rtc_alarm_irq()
171 u32 ctl1; in rzn1_rtc_1s_irq() local
176 ctl1 = readl(rtc->base + RZN1_RTC_CTL1); in rzn1_rtc_1s_irq()
177 ctl1 &= ~RZN1_RTC_CTL1_1SE; in rzn1_rtc_1s_irq()
178 writel(ctl1, rtc->base + RZN1_RTC_CTL1); in rzn1_rtc_1s_irq()
190 u32 ctl1; in rzn1_rtc_alarm_irq_enable() local
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H A Drtc-hym8563.c142 * CTL1 only contains TEST-mode bits apart from stop, in hym8563_rtc_set_time()
/linux/drivers/gpu/drm/i915/display/
H A Ddvo_tfp410.c242 u8 ctl1; in tfp410_dpms() local
244 if (!tfp410_readb(dvo, TFP410_CTL_1, &ctl1)) in tfp410_dpms()
248 ctl1 |= TFP410_CTL_1_PD; in tfp410_dpms()
250 ctl1 &= ~TFP410_CTL_1_PD; in tfp410_dpms()
252 tfp410_writeb(dvo, TFP410_CTL_1, ctl1); in tfp410_dpms()
257 u8 ctl1; in tfp410_get_hw_state() local
259 if (!tfp410_readb(dvo, TFP410_CTL_1, &ctl1)) in tfp410_get_hw_state()
262 if (ctl1 & TFP410_CTL_1_PD) in tfp410_get_hw_state()
H A Dintel_backlight_regs.h79 /* PCH CTL1 is totally different, all but the below bits are reserved. CTL2 is
/linux/drivers/net/wireless/ath/ath9k/
H A Dar9002_mac.c215 u32 ctl1, ctl6; in ar9002_set_txdesc() local
226 ctl1 = i->buf_len[0] | (i->is_last ? 0 : AR_TxMore); in ar9002_set_txdesc()
256 WRITE_ONCE(ads->ds_ctl1, ctl1); in ar9002_set_txdesc()
261 ctl1 |= (i->keyix != ATH9K_TXKEYIX_INVALID ? SM(i->keyix, AR_DestIdx) : 0) in ar9002_set_txdesc()
272 ctl1 |= AR_IsAggr | AR_MoreAggr; in ar9002_set_txdesc()
276 ctl1 |= AR_IsAggr; in ar9002_set_txdesc()
292 WRITE_ONCE(ads->ds_ctl1, ctl1); in ar9002_set_txdesc()
H A Deeprom_4k.c123 PR_EEP("Ant. Diversity ctl1", modal_hdr->antdiv_ctl1); in ath9k_dump_4k_modal_eeprom()
/linux/arch/arm/mach-sa1100/
H A Dneponset.c89 GPIO_LOOKUP("neponset-mdm-ctl1", 3, "cts", GPIO_ACTIVE_LOW),
90 GPIO_LOOKUP("neponset-mdm-ctl1", 4, "dsr", GPIO_ACTIVE_LOW),
91 GPIO_LOOKUP("neponset-mdm-ctl1", 5, "dcd", GPIO_ACTIVE_LOW),
101 GPIO_LOOKUP("neponset-mdm-ctl1", 0, "cts", GPIO_ACTIVE_LOW),
102 GPIO_LOOKUP("neponset-mdm-ctl1", 1, "dsr", GPIO_ACTIVE_LOW),
103 GPIO_LOOKUP("neponset-mdm-ctl1", 2, "dcd", GPIO_ACTIVE_LOW),
329 neponset_init_gpio(&d->gpio[2], &dev->dev, "neponset-mdm-ctl1", in neponset_probe()
/linux/drivers/phy/amlogic/
H A Dphy-meson8-hdmi-tx.c21 * HHI_HDMI_PHY_CNTL0 register. CTL0 and CTL1 is all we know about.
/linux/sound/soc/codecs/
H A Dcs35l33.h24 #define CS35L33_BST_CTL1 0x0B /* Boost Converter CTL1 */
H A Dcs35l35.h27 #define CS35L35_SP_FMT_CTL1 0x0D /* Serial Port Format CTL1 */
/linux/sound/mips/
H A Dhal2.h132 /* Bits in CTL1 register */
/linux/drivers/dma/
H A Dpch_dma.c740 pd->regs.dma_ctl1 = dma_readl(pd, CTL1); in pch_dma_save_regs()
763 dma_writel(pd, CTL1, pd->regs.dma_ctl1); in pch_dma_restore_regs()
/linux/drivers/iio/adc/
H A Dtwl4030-madc.c799 dev_err(&pdev->dev, "unable to read reg BCI CTL1 0x%X\n", in twl4030_madc_probe()
807 dev_err(&pdev->dev, "unable to write reg BCI Ctl1 0x%X\n", in twl4030_madc_probe()
/linux/drivers/gpu/drm/loongson/
H A Dlsdc_regs.h323 * data island. The values of CTL0, CTL1, CTL2, and CTL3 indicate the type of
/linux/drivers/net/ethernet/broadcom/
H A Dbgmac.h401 __le32 ctl1; member
/linux/drivers/net/ethernet/allwinner/
H A Dsun4i-emac.c379 /* set MAC CTL1 */ in emac_setup()
/linux/drivers/gpu/drm/bridge/
H A Dsil-sii8620.h849 /* Tx Zone Ctl1, default value: 0x00 */
/linux/drivers/net/wireless/broadcom/brcm80211/brcmsmac/
H A Dd11.h891 /* IFS ctl1 */