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/linux/Documentation/devicetree/bindings/mailbox/
H A Dqcom,cpucp-mbox.yaml13 The CPUSS Control Processor (CPUCP) mailbox controller enables communication
/linux/drivers/mailbox/
H A DKconfig285 Qualcomm Technologies, Inc. CPUSS Control Processor (CPUCP) mailbox
/linux/drivers/clk/qcom/
H A Dgcc-sc7180.c966 /* For CPUSS functionality the AHB clock needs to be left enabled */
1796 /* For CPUSS functionality the SYS NOC clock needs to be left enabled */
H A Dgcc-sm8150.c1350 /* required for cpuss */
1367 /* required for cpuss */
/linux/arch/arm64/boot/dts/qcom/
H A Dsa8775p.dtsi5244 cpuss-0-0-thermal {
5474 cpuss-0-1-thermal {
5728 cpuss-1-0-thermal {
5982 cpuss-1-1-thermal {