/linux/drivers/gpu/drm/i915/gem/ |
H A D | i915_gem_ttm.h | 1 /* SPDX-License-Identifier: MIT */ 13 * i915_gem_to_ttm - Convert a struct drm_i915_gem_object to a 22 return &obj->__do_not_access; in i915_gem_to_ttm() 31 * i915_ttm_is_ghost_object - Check if the ttm bo is a ghost object. 39 return bo->destroy != i915_ttm_bo_destroy; in i915_ttm_is_ghost_object() 43 * i915_ttm_to_gem - Convert a struct ttm_buffer_object to an embedding 82 * i915_ttm_gtt_binds_lmem - Should the memory be viewed as LMEM by the GTT? 85 * Return: true if memory should be viewed as LMEM for GTT binding purposes, 90 return mem->mem_type != I915_PL_SYSTEM; in i915_ttm_gtt_binds_lmem() 94 * i915_ttm_cpu_maps_iomem - Should the memory be viewed as IOMEM by the CPU? [all …]
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/linux/Documentation/RCU/ |
H A D | RTFP.txt | 4 This document describes RCU-related publications, and is followed by 19 with short-lived threads, such as the K42 research operating system. 20 However, Linux has long-lived tasks, so more is needed. 23 serialization, which is an RCU-like mechanism that relies on the presence 27 that these overheads were not so expensive in the mid-80s. Nonetheless, 28 passive serialization appears to be the first deferred-destruction 30 has lapsed, so this approach may be used in non-GPL software, if desired. 34 In 1987, Rashid et al. described lazy TLB-flush [RichardRashid87a]. 36 this paper helped inspire the update-side batching used in the later 38 a description of Argus that noted that use of out-of-date values can [all …]
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/linux/tools/perf/Documentation/ |
H A D | perf-timechart.txt | 1 perf-timechart(1) 5 ---- 6 perf-timechart - Tool to visualize total system behavior during a workload 9 -------- 14 ----------- 19 and CPU events (task switches, running times, CPU power states, etc), 20 but it's possible to record IO (disk, network) activity using -I argument. 23 that can be viewed with popular SVG viewers such as 'Inkscape'. Depending 24 on the events in the perf.data file, timechart will contain scheduler/cpu 34 ----------------- [all …]
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H A D | perf-arm-spe.txt | 1 perf-arm-spe(1) 5 ---- 6 perf-arm-spe - Support for Arm Statistical Profiling Extension within Perf tools 9 - [all...] |
/linux/Documentation/devicetree/bindings/bus/ |
H A D | socionext,uniphier-system-bus.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/bus/socionext,uniphier-system-bus.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 The UniPhier System Bus is an external bus that connects on-board devices to 11 the UniPhier SoC. It is a simple (semi-)parallel bus with address, data, and 16 within each bank to the CPU-viewed address. The needed setup includes the 21 - Masahiro Yamada <yamada.masahiro@socionext.com> 25 const: socionext,uniphier-system-bus 30 "#address-cells": [all …]
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/linux/Documentation/mm/ |
H A D | numa.rst | 17 Each of the 'cells' may be viewed as an SMP [symmetric multi-processor] subset 18 of the system--although some components necessary for a stand-alone SMP system 20 connected together with some sort of system interconnect--e.g., a crossbar or 21 point-to-point link are common types of NUMA system interconnects. Both of 27 to and accessible from any CPU attached to any cell and cache coherency 31 away the cell containing the CPU or IO bus making the memory access is from the 41 [cache misses] to be to "local" memory--memory on the same cell, if any--or 51 "closer" nodes--nodes that map to closer cells--will generally experience 63 the existing nodes--or the system memory for non-NUMA platforms--into multiple 66 application features on non-NUMA platforms, and as a sort of memory resource [all …]
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/linux/lib/ |
H A D | percpu-refcount.c | 1 // SPDX-License-Identifier: GPL-2.0-only 9 #include <linux/percpu-refcount.h> 13 * don't try to detect the ref hitting 0 - which means that get/put can just 15 * particular cpu can (and will) wrap - this is fine, when we go to shutdown the 24 * the ref hitting 0 on every put - this would require global synchronization 37 #define PERCPU_COUNT_BIAS (1LU << (BITS_PER_LONG - 1)) 45 (ref->percpu_count_ptr & ~__PERCPU_REF_ATOMIC_DEAD); in percpu_count_ptr() 49 * percpu_ref_init - initialize a percpu refcount 60 * Note that @release must not sleep - it may potentially be called from RCU 71 ref->percpu_count_ptr = (unsigned long) in percpu_ref_init() [all …]
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/linux/Documentation/admin-guide/mm/ |
H A D | numa_memory_policy.rst | 10 supported platforms with Non-Uniform Memory Access architectures since 2.4.?. 16 (``Documentation/admin-guide/cgroup-v1/cpusets.rst``) 19 programming interface that a NUMA-aware application can take advantage of. When 28 ------------------------ 41 not to overload the initial boot node with boot-time 45 this is an optional, per-task policy. When defined for a 61 In a multi-threaded task, task policies apply only to the thread 98 mapping-- i.e., at Copy-On-Write. 101 virtual address space--a.k.a. threads--independent of when 106 are NOT inheritable across exec(). Thus, only NUMA-aware [all …]
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/linux/Documentation/trace/coresight/ |
H A D | coresight-config.rst | 1 .. SPDX-License-Identifier: GPL-2.0 14 programming of the CoreSight system with pre-defined configurations that 17 Many CoreSight components can be programmed in complex ways - especially ETMs. 30 -------- 41 accesses in the driver - the resource usage and parameter descriptions 67 system - which is described below. 74 -------------- 82 enabled on a class of devices - i.e. any ETMv4, or specific devices, e.g. a 118 perf record -e cs_etm/autofdo/ myapp 137 system can be viewed using the configfs API. [all …]
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/linux/arch/arm/probes/ |
H A D | decode.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 32 /* We need a run-time check to determine str_pc_offset */ 41 long cpsr = regs->ARM_cpsr; in bx_write_pc() 49 regs->ARM_cpsr = cpsr; in bx_write_pc() 50 regs->ARM_pc = pcv; in bx_write_pc() 62 /* We need run-time testing to determine if load_write_pc() should interwork. */ 73 regs->ARM_pc = pcv; in load_write_pc() 90 /* We could be an ARMv6 binary on ARMv7 hardware so we need a run-time check. */ 101 regs->ARM_pc = pcv; in alu_write_pc() 118 * viewed as an array of these and declared like: [all …]
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/linux/Documentation/ |
H A D | memory-barriers.txt | 19 documentation at tools/memory-model/. Nevertheless, even this memory 20 model should be viewed as the collective opinion of its maintainers rather 37 Note also that it is possible that a barrier may be a no-op for an 48 - Device operations. 49 - Guarantees. 53 - Varieties of memory barrier. 54 - What may not be assumed about memory barriers? 55 - Address-dependency barriers (historical). 56 - Control dependencies. 57 - SMP barrier pairing. [all …]
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/linux/Documentation/networking/dsa/ |
H A D | dsa.rst | 22 An Ethernet switch typically comprises multiple front-panel ports and one 23 or more CPU or management ports. The DSA subsystem currently relies on the 27 gateways, or even top-of-rack switches. This host Ethernet controller will 28 be later referred to as "conduit" and "cpu" in DSA terminology and code. 36 For each front-panel port, DSA creates specialized network devices which are 37 used as controlling and data-flowing endpoints for use by the Linux networking 46 - what port is this frame coming from 47 - what was the reason why this frame got forwarded 48 - how to send CPU originated traffic to specific ports 52 on Port-based VLAN IDs). [all …]
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/linux/drivers/media/pci/cx18/ |
H A D | cx23418.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 11 #include <media/drv-intf/cx2341x.h> 19 IN[0] - Task ID. This is one of the XPU_CMD_MASK_YYY where XPU is 21 OUT[0] - Task handle. This handle is passed along with commands to 23 ReturnCode - One of the ERR_SYS_... */ 27 IN[0] - Task handle. Hanlde of the task to destroy 28 ReturnCode - One of the ERR_SYS_... */ 31 /* All commands for CPU have the following mask set */ 49 IN[0] - audio parameters (same as CX18_CPU_SET_AUDIO_PARAMETERS?) 50 IN[1] - caller buffer address, or 0 [all …]
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/linux/Documentation/security/ |
H A D | snp-tdx-threat-model.rst | 17 the kernel through various networking or limited HW-specific exposed 48 additional mechanisms to control guest-host page mapping. More details on 49 the x86-specific solutions can be found in 51 …https://www.amd.com/system/files/techdocs/sev-snp-strengthening-vm-isolation-with-integrity-protec… 56 that acts as a security manager. The host-side virtual machine monitor 63 In the following diagram, the "<--->" lines represent bi-directional 67 +-------------------+ +-----------------------+ 68 | CoCo guest VM |<---->| | 69 +-------------------+ | | 71 +-------------------+ | | [all …]
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/linux/Documentation/networking/device_drivers/ethernet/aquantia/ |
H A D | atlantic.rst | 1 .. SPDX-License-Identifier: GPL-2.0 8 For the aQuantia Multi-Gigabit PCI Express Family of Ethernet Adapters 12 - Identifying Your Adapter 13 - Configuration 14 - Supported ethtool options 15 - Command Line Parameters 16 - Config file parameters 17 - Support 18 - License 23 The driver in this release is compatible with AQC-100, AQC-107, AQC-108 [all …]
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/linux/Documentation/driver-api/usb/ |
H A D | gadget.rst | 11 This document presents a Linux-USB "Gadget" kernel mode API, for use 17 - Supports USB 2.0, for high speed devices which can stream data at 20 - Handles devices with dozens of endpoints just as well as ones with 21 just two fixed-function ones. Gadget drivers can be written so 24 - Flexible enough to expose more complex USB device capabilities such 28 - USB "On-The-Go" (OTG) support, in conjunction with updates to the 29 Linux-USB host side. 31 - Sharing data structures and API models with the Linux-USB host side 32 API. This helps the OTG support, and looks forward to more-symmetric 36 - Minimalist, so it's easier to support new device controller hardware. [all …]
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/linux/Documentation/arch/s390/ |
H A D | vfio-ap.rst | 13 The AP adapter cards are exposed via the AP bus. The motivation for vfio-ap 32 CPU. 45 sub-directory:: 76 significant bit, correspond to domains 0-255. 111 * NQAP: to enqueue an AP command-request message to a queue 112 * DQAP: to dequeue an AP command-reply message from a queue 132 an APID from 0-255. If a bit is set, the corresponding adapter is valid for 137 corresponds to an AP queue index (APQI) from 0-255. If a bit is set, the 142 changed by an AP command-request message sent to a usage domain from the 144 0-255. If a bit is set, the corresponding domain can be modified by an AP [all …]
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/linux/Documentation/admin-guide/ |
H A D | kernel-parameters.txt | 16 force -- enable ACPI if default was off 17 on -- enable ACPI but allow fallback to DT [arm64,riscv64] 18 off -- disable ACPI if default was on 19 noirq -- do not use ACPI for IRQ routing 20 strict -- Be less tolerant of platforms that are not 22 rsdt -- prefer RSDT over (default) XSDT 23 copy_dsdt -- copy DSDT to memory 24 nospcr -- disable console in ACPI SPCR table as 41 If set to vendor, prefer vendor-specific driver 73 Documentation/firmware-guide/acpi/debug.rst for more information about [all …]
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/linux/Documentation/process/ |
H A D | submitting-patches.rst | 13 works, see Documentation/process/development-process.rst. Also, read 14 Documentation/process/submit-checklist.rst 17 Documentation/devicetree/bindings/submitting-patches.rst. 20 If you're unfamiliar with ``git``, you would be well-advised to learn how to 26 :ref:`Documentation/process/maintainer-handbooks.rst <maintainer_handbooks_main>`. 29 ---------------------------- 46 --------------------- 48 Describe your problem. Whether your patch is a one-line bug fix or 54 Describe user-visible impact. Straight up crashes and lockups are 59 vendor/product-specific trees that cherry-pick only specific patches [all …]
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/linux/tools/power/pm-graph/ |
H A D | sleepgraph.py | 2 # SPDX-License-Identifier: GPL-2.0-only 21 # https://www.intel.com/content/www/us/en/developer/topic-technology/open/pm-graph/overview.html 23 # git@github.com:intel/pm-graph 33 # viewed in firefox or chrome. 51 # -- [all...] |
/linux/drivers/net/ethernet/intel/ixgbe/ |
H A D | ixgbe_main.c | 1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright(c) 1999 - 2018 Intel Corporation. */ 63 "Copyright (c) 1999-2016 Intel Corporation."; 78 /* ixgbe_pci_tbl - PCI Device ID Table 153 …"Maximum number of virtual functions to allocate per physical function - default is zero and maxim… 159 "Allow unsupported and untested SFP+ modules on 82599-based adapters"); 162 static int debug = -1; 181 return dev && (dev->netdev_ops == &ixgbe_netdev_ops); in netif_is_ixgbe() 190 parent_bus = adapter->pdev->bus->parent; in ixgbe_read_pci_cfg_word_parent() 192 return -1; in ixgbe_read_pci_cfg_word_parent() [all …]
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/linux/kernel/bpf/ |
H A D | verifier.c | 1 // SPDX-License-Identifier: GPL-2.0-only 2 /* Copyright (c) 2011-2014 PLUMgrid, http://plumgrid.com 7 #include <linux/bpf-cgroup.h> 23 #include <linux/error-injection.h> 54 * The first pass is depth-first-search to check that the program is a DAG. 56 * - larger than BPF_MAXINSNS insns 57 * - if loop is present (detected via back-edge) 58 * - unreachable insns exist (shouldn't be a forest. program = one function) 59 * - out of bounds or malformed jumps 71 * All registers are 64-bit. [all …]
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