Searched full:cppi (Results 1 – 5 of 5) sorted by relevance
33 - reg: offset and length of the following register spaces: CPPI DMA Controller,34 CPPI DMA Scheduler, Queue Manager
58 CPPI DMA Controller, USB CPPI DMA Scheduler, USB Queue Manager
54 uint32_t bd_offset; /* Offset of corresponding BD within CPPI RAM. */120 /* CPPI STATERAM has 512 slots for building TX/RX queues. */
117 device_set_desc(dev, "TI AM3359 CPPI 41"); in ti_am3359_cppi41_probe()
20 Host Port 0 CPPI Packet Streaming Interface interface supports 8 TX channels