Home
last modified time | relevance | path

Searched full:cpol (Results 1 – 25 of 177) sorted by relevance

12345678

/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DMIMGInstructions.td428 DMask:$dmask, UNorm:$unorm, CPol:$cpol,
431 let AsmString = asm#" $vdata, $vaddr, $srsrc$dmask$unorm$cpol$r128$tfe$lwe$da"
441 DMask:$dmask, UNorm:$unorm, CPol:$cpol,
444 let AsmString = asm#" $vdata, $vaddr, $srsrc$dmask$unorm$cpol$r128$lwe$da"
453 Dim:$dim, UNorm:$unorm, CPol:$cpol,
456 let AsmString = opcode#" $vdata, $vaddr0, $srsrc$dmask$dim$unorm$cpol$r128$a16$tfe$lwe"
466 Dim:$dim, UNorm:$unorm, CPol:$cpol,
469 let AsmString = opcode#" $vdata, "#AddrAsm#", $srsrc$dmask$dim$unorm$cpol$r128$a16$tfe$lwe"
478 Dim:$dim, UNorm:$unorm, CPol:$cpol,
481 let AsmString = opcode#" $vdata, $vaddr0, $srsrc$dmask$dim$unorm$cpol$r128$a16$tfe$lwe"
[all …]
H A DSIMemoryLegalizer.cpp287 AMDGPU::CPol::CPol Bit) const;
372 return enableNamedBit(MI, AMDGPU::CPol::GLC); in enableGLCBit()
378 return enableNamedBit(MI, AMDGPU::CPol::SLC); in enableSLCBit()
476 return enableNamedBit(MI, AMDGPU::CPol::SC0); in enableSC0Bit()
482 return enableNamedBit(MI, AMDGPU::CPol::SC1); in enableSC1Bit()
488 return enableNamedBit(MI, AMDGPU::CPol::NT); in enableNTBit()
525 return enableNamedBit(MI, AMDGPU::CPol::DLC); in enableDLCBit()
568 // Sets TH policy to \p Value if CPol operand is present in instruction \p MI.
571 AMDGPU::CPol::CPol Value) const;
572 // Sets Scope policy to \p Value if CPol operand is present in instruction \p
[all …]
H A DSIInstrFormats.td358 bits<5> cpol;
368 let Inst{13} = cpol{CPolBit.GLC};
371 let Inst{25} = cpol{CPolBit.SLC};
384 let Inst{7} = cpol{CPolBit.SCC};
396 let Inst{7} = cpol{CPolBit.SCC};
412 let Inst{7} = cpol{CPolBit.DLC};
423 bits<5> cpol;
439 let Inst{12} = cpol{CPolBit.SLC};
440 let Inst{13} = cpol{CPolBit.DLC};
441 let Inst{14} = cpol{CPolBit.GLC};
[all …]
H A DFLATInstructions.td123 bits<5> cpol;
145 let Inst{16} = !if(ps.has_glc, cpol{CPolBit.GLC}, ps.glcValue);
146 let Inst{17} = cpol{CPolBit.SLC};
185 bits<6> cpol;
195 let Inst{54-53} = cpol{2-1}; // th{2-1}
196 let Inst{52} = !if(ps.IsAtomicRet, 1, cpol{0}); // th{0}
197 let Inst{51-50} = cpol{4-3}; // scope
225 !if(HasTiedOutput, (ins CPol:$cpol, vdata_op:$vdst_in),
226 (ins CPol_0:$cpol)));
229 # "$offset$cpol";
[all …]
/freebsd/sys/contrib/device-tree/Bindings/iio/adc/
H A Dmicrochip,mcp3201.yaml36 spi-cpol: true
45 spi-cpol: [ spi-cpha ]
46 spi-cpha: [ spi-cpol ]
69 spi-cpol;
H A Dti,adc084s021.yaml25 spi-cpol: true
35 - spi-cpol
53 spi-cpol;
H A Drohm,bd79104.yaml36 spi-cpol: true
44 - spi-cpol
65 spi-cpol;
/freebsd/sys/contrib/device-tree/Bindings/iio/resolver/
H A Dadi,ad2s90.yaml32 spi-cpol: true
41 spi-cpol: [ spi-cpha ]
42 spi-cpha: [ spi-cpol ]
59 spi-cpol;
H A Dad2s90.txt9 - spi-cpol and spi-cpha:
11 spi-cpha, spi-cpol.
29 spi-cpol;
/freebsd/sys/contrib/device-tree/Bindings/iio/dac/
H A Dti,dac082s085.yaml29 spi-cpol:
31 Must be either spi-cpha, or spi-cpol but not both.
45 - spi-cpol
69 spi-cpol;
H A Dti-dac082s085.txt12 - spi-cpha, spi-cpol: SPI mode (0,1) or (1,0) must be used, so specify
13 either spi-cpha or spi-cpol (but not both).
32 spi-cpol;
H A Dadi,ad5766.yaml35 spi-cpol: true
47 - spi-cpol
61 spi-cpol;
H A Dadi,ad5592r.yaml24 spi-cpol: true
64 - spi-cpol
67 spi-cpol: false
130 spi-cpol;
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dfsl-ls1028a-qds.dts153 spi-cpol;
163 spi-cpol;
173 spi-cpol;
188 spi-cpol;
198 spi-cpol;
208 spi-cpol;
223 spi-cpol;
/freebsd/sys/contrib/device-tree/Bindings/display/
H A Delgin,jg10309-01.yaml31 spi-cpol: true
37 - spi-cpol
52 spi-cpol;
/freebsd/sys/contrib/device-tree/Bindings/net/nfc/
H A Dmarvell,nci.yaml60 spi-cpol: true
76 spi-cpol: false
107 spi-cpol: false
149 spi-cpol;
/freebsd/sys/contrib/device-tree/Bindings/iio/gyroscope/
H A Dadi,adxrs290.yaml27 spi-cpol: true
38 - spi-cpol
56 spi-cpol;
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DAMDGPUInstPrinter.cpp157 const int64_t TH = Imm & CPol::TH; in printCPol()
158 const int64_t Scope = Imm & CPol::SCOPE; in printCPol()
166 if (Imm & CPol::GLC) in printCPol()
170 if (Imm & CPol::SLC) in printCPol()
172 if ((Imm & CPol::DLC) && AMDGPU::isGFX10Plus(STI)) in printCPol()
174 if ((Imm & CPol::SCC) && AMDGPU::isGFX90A(STI)) in printCPol()
176 if (Imm & ~CPol::ALL_pregfx12) in printCPol()
189 bool IsStore = (THType == AMDGPU::CPol::TH_TYPE_STORE); in printTH()
193 if (THType == AMDGPU::CPol::TH_TYPE_ATOMIC) { in printTH()
195 if (TH & AMDGPU::CPol::TH_ATOMIC_CASCADE) { in printTH()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dvertexcom-mse102x.yaml39 spi-cpol: true
50 - spi-cpol
68 spi-cpol;
H A Dqca,qca7000.txt19 - spi-cpol : Must be set
52 spi-cpol; /* SPI mode: CPOL=1 */
/freebsd/sys/contrib/device-tree/Bindings/iio/imu/
H A Dadi,adis16550.yaml25 spi-cpol: true
49 - spi-cpol
68 spi-cpol;
/freebsd/sys/contrib/device-tree/Bindings/mtd/
H A Dnxp-spifi.txt25 - spi-cpol : Controller only supports mode 0 and 3 so either
26 both spi-cpol and spi-cpha should be present or
46 spi-cpol;
/freebsd/sys/contrib/device-tree/Bindings/display/panel/
H A Dsamsung,lms397kf04.yaml40 spi-cpol: true
53 - spi-cpol
75 spi-cpol;
H A Dsamsung,s6d27a1.yaml47 spi-cpol: true
60 - spi-cpol
83 spi-cpol;
H A Dsamsung,lms380kf01.yaml48 spi-cpol: true
59 - spi-cpol
83 spi-cpol;

12345678